[PATCH 2/3] riscv: Implement Zicbom-based cache management operations

[Christoph Hellwig]

On Thu, Jun 16, 2022 at 11:46:45AM +0200, Heiko Stübner wrote:
> Without CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE and friends
> dev_is_dma_coherent() will always return true otherwise the dma_coherent
> attribute. Hence the "coherent" value for every system not managing things
> will suddenly show as non-coherent where it showed as coherent before.

Yes.

> As we already have detection-points for non-coherent systems (zicbom
> detection, t-head errata detection)

No, we don't.  There are plenty of reasons to support Zicbom without
every having any non-coherent DMA periphals.  Or just some non-coherent
ones.  So that alone is not a good indicator at all.

The proper interface for that in DT-based setups i of_dma_is_coherent(),
which looks at the dma-coherent DT property.  And given that RISC-V
started out as all coherent we need to follow the powerpc way
(CONFIG_OF_DMA_DEFAULT_COHERENT) and default to coherent with an
explcit propery for non-coherent devices, and not the arm/arm64 way
where non-coherent is the default and coherent devices need the property.