[PATCH v2 1/2] dt-bindings: sifive: add cache-set value of 2048
Rob Herring
robh at kernel.org
Thu Jun 9 08:08:25 PDT 2022
On Wed, Jun 08, 2022 at 04:39:31PM -0700, Atul Khare wrote:
> Fixes Running device tree schema validation error messages like
> '... cache-sets:0:0: 1024 was expected'.
>
> The existing bindings had a single enumerated value of 1024, which
> trips up the dt-schema checks. The ISA permits any arbitrary power
> of two for the cache-sets value, but we decided to add the single
> additional value of 2048 because we couldn't spot an obvious way
> to express the constraint in the schema.
There is not any way to express power of 2, so you have to list values.
Rather than just adding 1 more value, I would add at least a few more so
we're not adding these one by one. This is for a specific cache
implementation, so it can't really be *any* power of 2. Designs have
some limits or physics does.
>
> Signed-off-by: Atul Khare <atulkhare at rivosinc.com>
> ---
> Changes since v1 [1]: Rebased on latest version
What version is that because this did not apply to v5.19-rc1 for some
reason.
> [1]: https://tinyurl.com/yvdvmsjd
> ---
> ---
> Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> index e2d330bd4608..309517b78e84 100644
> --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> +++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> @@ -46,7 +46,9 @@ properties:
> const: 2
>
> cache-sets:
> - const: 1024
> + # Note: Technically this can be any power of 2, but we didn't see
> an obvious way
> + # to express the constraint in Yaml
> + enum: [1024, 2048]
>
> cache-size:
> const: 2097152
Surely this is not fixed either?
> --
> 2.34.1
>
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