[PATCH 1/1] RISC-V: Change signature header field to use `.ascii` instead of opcode

[Jessica Clarke]

On 17 Jan 2022, at 17:39, Florian Wagner <florian.wagner at nextsilicon.com> wrote:
> 
> The `MZ` in the signature header field is now encoded via `.ascii` to make
> the kernel compile without the `c` extension.
> 
> Signed-off-by: Florian Wagner <florian.wagner at nextsilicon.com>
> Signed-off-by: Yaron Dinkin <yaron.dinkin at nextsilicon.com>
> ---
> arch/riscv/kernel/head.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index f52f01ecbeea..931b63464b90 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -48,7 +48,7 @@ ENTRY(_start)
> 	/*
> 	 * This instruction decodes to "MZ" ASCII required by UEFI.
> 	 */
> -	c.li s4,-13
> +	.ascii "MZ"
> 	j _start_kernel

CONFIG_EFI has select RISCV_ISA_C, so this doesn’t seem to achieve
anything? If you then remove that select, well, you get an EFI binary
that works, but if you jump to it directly as a non-EFI binary then
you’ll trap on a non-RVC system as that won’t be a valid instruction.
So I think this needs more explanation and discussion.

Jess