[PATCH v2 14/17] riscv: dts: microchip: add fpga fabric section to icicle kit

Conor.Dooley at microchip.com Conor.Dooley at microchip.com
Fri Jan 14 05:35:52 PST 2022


On 17/12/2021 13:43, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Conor,
> 
> On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley at microchip.com> wrote:
>> From: Conor Dooley <conor.dooley at microchip.com>
>>
>> Split the device tree for the Microchip MPFS into two sections by adding
>> microchip-mpfs-fabric.dtsi, which contains peripherals contained in the
>> FPGA fabric.
>>
>> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> 
> Thanks for your patch!
> 
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>> @@ -0,0 +1,13 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
>> +
>> +/ {
>> +       corePWM0: pwm at 41000000 {
>> +               compatible = "microchip,corepwm";
>> +               reg = <0x0 0x41000000 0x0 0xF0>;
>> +               microchip,sync-update = /bits/ 8 <0>;
>> +               #pwm-cells = <2>;
>> +               clocks = <&clkcfg CLK_FIC3>;
>> +               status = "disabled";
>> +       };
> 
> I'm wondering if these should be grouped under a "fabric" subnode,
> like we have an "soc" subnode for on-SoC devices? Rob?
I was about to send v3 but I realised nothing happened with this.
I will leave it as a dtsi and submit, but I'll be all ears if Rob wants 
something else.

> 
> BTW, do you already have a naming plan for different revisions of
> FPGA fabric cores?
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
> 



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