[PATCH v6 14/14] riscv: add memory-type errata for T-Head

[Samuel Holland]

On 2/9/22 6:38 AM, Heiko Stuebner wrote:
> Some current cpus based on T-Head cores implement memory-types
> way different than described in the svpbmt spec even going
> so far as using PTE bits marked as reserved.
> 
> Add the T-Head vendor-id and necessary errata code to
> replace the affected instructions.
> 
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
Tested-by: Samuel Holland <samuel at sholland.org>