[PATCH v5 00/12] Update the Icicle Kit device tree

[Palmer Dabbelt]

On Mon, 31 Jan 2022 03:47:15 PST (-0800), conor.dooley at microchip.com wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> This series updates the Microchip Icicle Kit device tree by adding a
> host of peripherals, and some updates to the memory map. In addition,
> the device tree has been split into a third part, which contains "soft"
> peripherals that are in the fpga fabric.
>
> Several of the entries are for peripherals that have not get had their
> drivers upstreamed, so in those cases the dt bindings are included where
> appropriate in order to avoid the many "DT compatible string <x> appears
> un-documented" errors.
>
> Depends on mpfs clock driver binding (on clk/next) to provide
> dt-bindings/clock/microchip,mpfs-clock.h
> and on the other changes to the icicle/mpfs device tree from geert
> that are already in linux/riscv/for-next.
>
> Additionally, the interrupt-extended warnings on the plic/clint are
> cleared by [1] & [2].
>
> [1] https://lore.kernel.org/linux-riscv/cover.1639744468.git.geert@linux-m68k.org/
> [2] https://lore.kernel.org/linux-riscv/cover.1639744106.git.geert@linux-m68k.org/
>
> Changes from v4:
> - dont include icicle_kit_defconfig, accidentally added in v3
> - drop prescaler from mpfs-rtc & calculate the value instead
> - use corei2c as a fallback device for mpfs-i2c
> - drop spi dt-binding (on spi-next)
>   commit 2da187304e556ac59cf2dacb323cc78ded988169
> - drop usb dt-binding (on usb-next)
>
> Changes from v3:
> - drop "mailbox: change mailbox-mpfs compatible string", already upstream:
>   commit f10b1fc0161cd99e ("mailbox: change mailbox-mpfs compatible string")
> - fix copy paste error in microchip,mpfs-mailbox dt-binding
> - remove whitespace in syscontroller dt entry
>
> Changes from v2:
> - dropped plic int header & corresponding defines in dts{,i}
> - use $ref to drmode in mpfs-musb binding
> - split changes to dts{,i} again: functional changes to existing
>   elements now are in a new patch
> - drop num-cs property in mpfs-spi binding
> - dont make the system controller a simple-mfd
> - move the separate bindings for rng/generic system services into the
>   system controller binding
> - added an instance corei2c as i2c2 in the fabric dtsi
> - add version numbering to corepwm and corei2c compat string (-rtl-vN)
>
> Conor Dooley (12):
>   dt-bindings: soc/microchip: update syscontroller compatibles
>   dt-bindings: soc/microchip: add services as children of sys ctrlr
>   dt-bindings: i2c: add bindings for microchip mpfs i2c
>   dt-bindings: rtc: add bindings for microchip mpfs rtc
>   dt-bindings: gpio: add bindings for microchip mpfs gpio
>   dt-bindings: pwm: add microchip corepwm binding
>   riscv: dts: microchip: use clk defines for icicle kit
>   riscv: dts: microchip: add fpga fabric section to icicle kit
>   riscv: dts: microchip: refactor icicle kit device tree
>   riscv: dts: microchip: update peripherals in icicle kit device tree
>   riscv: dts: microchip: add new peripherals to icicle kit device tree
>   MAINTAINERS: update riscv/microchip entry
>
>  .../bindings/gpio/microchip,mpfs-gpio.yaml    |  80 ++++++
>  .../bindings/i2c/microchip,mpfs-i2c.yaml      |  57 ++++
>  ...ilbox.yaml => microchip,mpfs-mailbox.yaml} |   6 +-
>  .../bindings/pwm/microchip,corepwm.yaml       |  75 +++++
>  .../bindings/rtc/microchip,mfps-rtc.yaml      |  58 ++++
>  .../microchip,mpfs-sys-controller.yaml        |  72 +++++
>  ...icrochip,polarfire-soc-sys-controller.yaml |  35 ---
>  MAINTAINERS                                   |   2 +
>  .../dts/microchip/microchip-mpfs-fabric.dtsi  |  25 ++
>  .../microchip/microchip-mpfs-icicle-kit.dts   | 115 ++++++--
>  .../boot/dts/microchip/microchip-mpfs.dtsi    | 262 +++++++++++++++---
>  11 files changed, 683 insertions(+), 104 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
>  create mode 100644 Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml
>  rename Documentation/devicetree/bindings/mailbox/{microchip,polarfire-soc-mailbox.yaml => microchip,mpfs-mailbox.yaml} (82%)
>  create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
>  create mode 100644 Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
>  delete mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>  create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi

Looks like Rob still has some feedback that still needs to be addressed.  
I'm happy to take these via the RISC-V tree when the bindings are set 
(assuming the DTs match whatever gets agreed upons), but also fine if 
someone else wants to take it so

Acked-by: Palmer Dabbelt <palmer at rivosinc.com>

Either way, I'm going to drop this (and the v4, which was at the top of 
my inbox) as it looks like there'll be at least a v6.

Thanks!