[PATCH v4 10/12] RISC-V: add rd reg parsing to insn.h header

Lad, Prabhakar prabhakar.csengg at gmail.com
Sun Dec 11 09:41:01 PST 2022


On Wed, Dec 7, 2022 at 6:09 PM Heiko Stuebner <heiko at sntech.de> wrote:
>
> From: Heiko Stuebner <heiko.stuebner at vrull.eu>
>
> Add a macro to allow parsing of the rd register from an instruction.
>
> Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
> Signed-off-by: Heiko Stuebner <heiko.stuebner at vrull.eu>
> ---
>  arch/riscv/include/asm/insn.h | 5 +++++
>  1 file changed, 5 insertions(+)
>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>

Cheers,
Prabhakar



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