[PATCH 6/6] riscv: dts: starfive: Add crypto and DMA node for VisionFive 2
JiaJie Ho
jiajie.ho at starfivetech.com
Mon Dec 5 19:55:27 PST 2022
> -----Original Message-----
> From: Conor Dooley <conor at kernel.org>
> Sent: Friday, December 2, 2022 2:04 AM
> To: JiaJie Ho <jiajie.ho at starfivetech.com>
> Cc: Conor.Dooley at microchip.com; robh+dt at kernel.org;
> herbert at gondor.apana.org.au; linux-crypto at vger.kernel.org;
> kernel at esmil.dk; davem at davemloft.net; devicetree at vger.kernel.org;
> linux-kernel at vger.kernel.org; linux-riscv at lists.infradead.org;
> krzysztof.kozlowski+dt at linaro.org
> Subject: Re: [PATCH 6/6] riscv: dts: starfive: Add crypto and DMA node for
> VisionFive 2
>
> On Thu, Dec 01, 2022 at 06:17:26AM +0000, JiaJie Ho wrote:
> > > -----Original Message-----
> > > From: Conor.Dooley at microchip.com <Conor.Dooley at microchip.com>
>
> In that case, the SoB block should look like:
>
> Co-developed-by: Huan Feng <huan.feng at starfivetech.com>
> Signed-off-by: Huan Feng <huan.feng at starfivetech.com>
> Signed-off-by: Jia Jie Ho <jiajie.ho at starfivetech.com>
>
> Similarly for any other patches they may have co-developed :)
>
I'll add these in the v2.
> If the hardware is always present, why not drop the "disabled" in jh7110.dtsi
> & these two entries marking them as "okay" in the .dts?
>
Okay, I'll update these too.
Thanks again for the suggestions.
Best regards,
Jia Jie
More information about the linux-riscv
mailing list