[PATCH v2] clk: microchip: mpfs: don't reset disabled peripherals

[Stephen Boyd]

Quoting Conor Dooley (2022-04-11 00:23:41)
> The current clock driver for PolarFire SoC puts the hardware behind
> "periph" clocks into reset if their clock is disabled. CONFIG_PM was
> recently added to the riscv defconfig and exposed issues caused by this
> behaviour, where the Cadence GEM was being put into reset between its
> bringup & the PHY bringup:
> 
> https://lore.kernel.org/linux-riscv/9f4b057d-1985-5fd3-65c0-f944161c7792@microchip.com/
> 
> Fix this (for now) by removing the reset from mpfs_periph_clk_disable.
> 
> Fixes: 635e5e73370e ("clk: microchip: Add driver for Microchip PolarFire SoC")
> Reviewed-by: Daire McNamara <daire.mcnamara at microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---

Applied to clk-fixes