[PATCH] dt-bindings: riscv: Add mmu-type riscv,sv57

[Rob Herring]

On Thu, 14 Apr 2022 17:16:38 +0200, Niklas Cassel wrote:
> sv57 is defined in the RISC-V Privileged Specification document.
> 
> Additionally, commit 011f09d12052 ("riscv: mm: Set sv57 on defaultly")
> changed the default MMU mode to sv57, if supported by current hardware.
> 
> Add riscv,sv57 to the list of valid mmu-type values.
> 
> Signed-off-by: Niklas Cassel <niklas.cassel at wdc.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh at kernel.org>