[PATCH v2 1/1] hwrng: mpfs - add polarfire soc hwrng support
Herbert Xu
herbert at gondor.apana.org.au
Fri Apr 15 01:40:34 PDT 2022
On Fri, Apr 08, 2022 at 10:09:12AM +0000, conor.dooley at microchip.com wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
>
> Add a driver to access the hardware random number generator on the
> Polarfire SoC. The hwrng can only be accessed via the system controller,
> so use the mailbox interface the system controller exposes to access the
> hwrng.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
> drivers/char/hw_random/Kconfig | 13 ++++
> drivers/char/hw_random/Makefile | 1 +
> drivers/char/hw_random/mpfs-rng.c | 104 ++++++++++++++++++++++++++++++
> 3 files changed, 118 insertions(+)
> create mode 100644 drivers/char/hw_random/mpfs-rng.c
Patch applied. Thanks.
--
Email: Herbert Xu <herbert at gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
More information about the linux-riscv
mailing list