[PATCH v9 12/12] riscv: add memory-type errata for T-Head

[Philipp Tomsich]

On Wed, 13 Apr 2022 at 05:06, Heiko Stuebner <heiko at sntech.de> wrote:
>
> Some current cpus based on T-Head cores implement memory-types
> way different than described in the svpbmt spec even going
> so far as using PTE bits marked as reserved.
>
> Add the T-Head vendor-id and necessary errata code to
> replace the affected instructions.
>
> Signed-off-by: Heiko Stuebner <heiko at sntech.de>
> Tested-by: Samuel Holland <samuel at sholland.org>

Reviewed-by: Philipp Tomsich <philipp.tomsich at vrull.eu>