[PATCH v2 5/9] dt-bindings: clk: mpfs: add defines for two new clocks

[Krzysztof Kozlowski]

On 12/04/2022 14:26, Conor.Dooley at microchip.com wrote:
>>> Additionally MSSPLL is the source for CLK_{CPI,AXI,AHB} so I put it at
>>> the top. I have no particular preference, so if you want them reordered
>>> so that MSSPLL is under RTCREF just say the word :)
>>
>> Hm, are these in the same clock controller (device, not driver)? If yes,
>> then please order them numerically. Pretty often one binding header have
>> IDs for several clock controllers, so then it's a different case.
> 
> Not *quite* sure what you mean by device. There is only one SoC that
> this header applies to, but in the actual design the MSSPLL is in one
> block, the RTC divider in another and CLK_CPU -> CLK_CFM in a third.

By device I meant here part of Soc responsible for clocks which could be
called a self-containing block. Pretty often such block maps to a Linux
"struct device" or some wrapper around it (e.g. clock-controller
device). For example such "self-containing block" has device node in DTS.

Judging by your description, these will be different blocks / device
nodes in DTS?

Best regards,
Krzysztof