[PATCH v1 6/6] RISC-V: Add the Zifencei extension
Palmer Dabbelt
palmer at rivosinc.com
Fri Apr 1 22:00:41 PDT 2022
Recent versions of binutils default to an ISA spec version that doesn't
include Zifencei as part of I, so Linux has recently started passing
this in -march.
Signed-off-by: Palmer Dabbelt <palmer at rivosinc.com>
---
target-riscv.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target-riscv.c b/target-riscv.c
index afd6fafa..ff4dfba3 100644
--- a/target-riscv.c
+++ b/target-riscv.c
@@ -18,6 +18,7 @@
#define RISCV_FPU (RISCV_FLOAT|RISCV_DOUBLE|RISCV_FDIV)
#define RISCV_GENERIC (RISCV_MUL|RISCV_DIV|RISCV_ATOMIC|RISCV_FPU)
#define RISCV_ZICSR (1 << 10)
+#define RISCV_ZIFENCEI (1 << 11)
static unsigned int riscv_flags;
@@ -39,6 +40,7 @@ static void parse_march_riscv(const char *arg)
{ "d", RISCV_DOUBLE|RISCV_FDIV|RISCV_ZICSR },
{ "c", RISCV_COMP },
{ "_zicsr", RISCV_ZICSR },
+ { "_zifencei", RISCV_ZIFENCEI },
};
int i;
@@ -132,6 +134,8 @@ static void predefine_riscv(const struct target *self)
predefine("__riscv_muldiv", 1, "1");
if (riscv_flags & RISCV_ZICSR)
predefine("__riscv_zicsr", 1, "1");
+ if (riscv_flags & RISCV_ZIFENCEI)
+ predefine("__riscv_zifencei", 1, "1");
if (cmodel)
predefine_strong("__riscv_cmodel_%s", cmodel);
--
2.34.1
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