[PATCH V2 1/2] riscv: Add RISC-V svpbmt extension
Nick Kossifidis
mick at ics.forth.gr
Mon Sep 27 17:23:37 PDT 2021
Hello Greg,
Στις 2021-09-27 23:53, Greg Favor έγραψε:
> With the big caveat that I haven't been in the middle of this
> discussion, it seems like Allwinner D1's changes represent a custom
> (and nonconforming) extension. Isn't this just a matter of the patch
> needing to be treated as for a RISC-V custom extension per the recently
> clarified policy for handling upstreaming/etc. of custom extensions?
> (Philipp can speak to this clarified policy.) Or what am I missing?
>
The Priv. Spec. defines sv39/48 without allowing custom use of reserved
pte bits by implementations, Allwinner D1 claims to be sv39 but it does
use reserved PTE bits. When vendors want to do custom stuff on PTEs, the
standard says they may use values 14-15 on satp.mode for that and define
their own MMU basically. Messing up with the implementation of sv39 is
not an extension, is violation of sv39. Even worse this implementation
can't work if we ignore the customization since without setting the
required bits on PTEs dma (and I believe SMP as well) doesn't work.
Regards,
Nick
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