Patch "perf tools: Fix arm64 build error with gcc-11" has been added to the 5.10-stable tree
gregkh at linuxfoundation.org
gregkh at linuxfoundation.org
Wed Sep 1 02:45:35 PDT 2021
This is a note to let you know that I've just added the patch titled
perf tools: Fix arm64 build error with gcc-11
to the 5.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
perf-tools-fix-arm64-build-error-with-gcc-11.patch
and it can be found in the queue-5.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable at vger.kernel.org> know about it.
>From 067012974c8ae31a8886046df082aeba93592972 Mon Sep 17 00:00:00 2001
From: Jianlin Lv <Jianlin.Lv at arm.com>
Date: Thu, 18 Feb 2021 11:12:45 +0800
Subject: perf tools: Fix arm64 build error with gcc-11
MIME-Version: 1.0
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From: Jianlin Lv <Jianlin.Lv at arm.com>
commit 067012974c8ae31a8886046df082aeba93592972 upstream.
gcc version: 11.0.0 20210208 (experimental) (GCC)
Following build error on arm64:
.......
In function ‘printf’,
inlined from ‘regs_dump__printf’ at util/session.c:1141:3,
inlined from ‘regs__printf’ at util/session.c:1169:2:
/usr/include/aarch64-linux-gnu/bits/stdio2.h:107:10: \
error: ‘%-5s’ directive argument is null [-Werror=format-overflow=]
107 | return __printf_chk (__USE_FORTIFY_LEVEL - 1, __fmt, \
__va_arg_pack ());
......
In function ‘fprintf’,
inlined from ‘perf_sample__fprintf_regs.isra’ at \
builtin-script.c:622:14:
/usr/include/aarch64-linux-gnu/bits/stdio2.h:100:10: \
error: ‘%5s’ directive argument is null [-Werror=format-overflow=]
100 | return __fprintf_chk (__stream, __USE_FORTIFY_LEVEL - 1, __fmt,
101 | __va_arg_pack ());
cc1: all warnings being treated as errors
.......
This patch fixes Wformat-overflow warnings. Add helper function to
convert NULL to "unknown".
Signed-off-by: Jianlin Lv <Jianlin.Lv at arm.com>
Reviewed-by: John Garry <john.garry at huawei.com>
Acked-by: Jiri Olsa <jolsa at redhat.com>
Cc: Albert Ou <aou at eecs.berkeley.edu>
Cc: Alexander Shishkin <alexander.shishkin at linux.intel.com>
Cc: Anju T Sudhakar <anju at linux.vnet.ibm.com>
Cc: Athira Jajeev <atrajeev at linux.vnet.ibm.com>
Cc: Guo Ren <guoren at kernel.org>
Cc: Kajol Jain <kjain at linux.ibm.com>
Cc: Leo Yan <leo.yan at linaro.org>
Cc: Mark Rutland <mark.rutland at arm.com>
Cc: Mathieu Poirier <mathieu.poirier at linaro.org>
Cc: Namhyung Kim <namhyung at kernel.org>
Cc: Paul Walmsley <paul.walmsley at sifive.com>
Cc: Peter Zijlstra <peterz at infradead.org>
Cc: Ravi Bangoria <ravi.bangoria at linux.ibm.com>
Cc: Will Deacon <will at kernel.org>
Cc: Palmer Dabbelt <palmer at dabbelt.com>
Cc: iecedge at gmail.com
Cc: linux-csky at vger.kernel.org
Cc: linux-riscv at lists.infradead.org
Link: http://lore.kernel.org/lkml/20210218031245.2078492-1-Jianlin.Lv@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme at redhat.com>
Signed-off-by: Hanjun Guo <guohanjun at huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
---
tools/perf/arch/arm/include/perf_regs.h | 2 +-
tools/perf/arch/arm64/include/perf_regs.h | 2 +-
tools/perf/arch/csky/include/perf_regs.h | 2 +-
tools/perf/arch/powerpc/include/perf_regs.h | 2 +-
tools/perf/arch/riscv/include/perf_regs.h | 2 +-
tools/perf/arch/s390/include/perf_regs.h | 2 +-
tools/perf/arch/x86/include/perf_regs.h | 2 +-
tools/perf/util/perf_regs.h | 7 +++++++
8 files changed, 14 insertions(+), 7 deletions(-)
--- a/tools/perf/arch/arm/include/perf_regs.h
+++ b/tools/perf/arch/arm/include/perf_regs.h
@@ -15,7 +15,7 @@ void perf_regs_load(u64 *regs);
#define PERF_REG_IP PERF_REG_ARM_PC
#define PERF_REG_SP PERF_REG_ARM_SP
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_ARM_R0:
--- a/tools/perf/arch/arm64/include/perf_regs.h
+++ b/tools/perf/arch/arm64/include/perf_regs.h
@@ -15,7 +15,7 @@ void perf_regs_load(u64 *regs);
#define PERF_REG_IP PERF_REG_ARM64_PC
#define PERF_REG_SP PERF_REG_ARM64_SP
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_ARM64_X0:
--- a/tools/perf/arch/csky/include/perf_regs.h
+++ b/tools/perf/arch/csky/include/perf_regs.h
@@ -15,7 +15,7 @@
#define PERF_REG_IP PERF_REG_CSKY_PC
#define PERF_REG_SP PERF_REG_CSKY_SP
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_CSKY_A0:
--- a/tools/perf/arch/powerpc/include/perf_regs.h
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -73,7 +73,7 @@ static const char *reg_names[] = {
[PERF_REG_POWERPC_SIER3] = "sier3",
};
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
return reg_names[id];
}
--- a/tools/perf/arch/riscv/include/perf_regs.h
+++ b/tools/perf/arch/riscv/include/perf_regs.h
@@ -19,7 +19,7 @@
#define PERF_REG_IP PERF_REG_RISCV_PC
#define PERF_REG_SP PERF_REG_RISCV_SP
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_RISCV_PC:
--- a/tools/perf/arch/s390/include/perf_regs.h
+++ b/tools/perf/arch/s390/include/perf_regs.h
@@ -14,7 +14,7 @@ void perf_regs_load(u64 *regs);
#define PERF_REG_IP PERF_REG_S390_PC
#define PERF_REG_SP PERF_REG_S390_R15
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_S390_R0:
--- a/tools/perf/arch/x86/include/perf_regs.h
+++ b/tools/perf/arch/x86/include/perf_regs.h
@@ -23,7 +23,7 @@ void perf_regs_load(u64 *regs);
#define PERF_REG_IP PERF_REG_X86_IP
#define PERF_REG_SP PERF_REG_X86_SP
-static inline const char *perf_reg_name(int id)
+static inline const char *__perf_reg_name(int id)
{
switch (id) {
case PERF_REG_X86_AX:
--- a/tools/perf/util/perf_regs.h
+++ b/tools/perf/util/perf_regs.h
@@ -33,6 +33,13 @@ extern const struct sample_reg sample_re
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id);
+static inline const char *perf_reg_name(int id)
+{
+ const char *reg_name = __perf_reg_name(id);
+
+ return reg_name ?: "unknown";
+}
+
#else
#define PERF_REGS_MASK 0
#define PERF_REGS_MAX 0
Patches currently in stable-queue which might be from Jianlin.Lv at arm.com are
queue-5.10/perf-tools-fix-arm64-build-error-with-gcc-11.patch
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