[v4 10/11] riscv: dts: fu740: Add pmu node

Jessica Clarke jrtc27 at jrtc27.com
Fri Oct 29 05:25:04 PDT 2021

On 29 Oct 2021, at 07:05, Atish Patra <atishp at atishpatra.org> wrote:
> On Thu, Oct 28, 2021 at 5:07 PM Jessica Clarke <jrtc27 at jrtc27.com> wrote:
>> On 29 Oct 2021, at 00:37, Atish Patra <atishp at atishpatra.org> wrote:
>>> On Thu, Oct 28, 2021 at 1:49 PM Jessica Clarke <jrtc27 at jrtc27.com> wrote:
>>>> On Mon, Oct 25, 2021 at 12:53:49PM -0700, Atish Patra wrote:
>>>>> HiFive unmatched supports HPMCounters but does not implement mcountinhibit
>>>>> or sscof extension. Thus, perf monitoring can be used on the unmatched
>>>>> board without sampling.
>>>>> Add the PMU node with compatible string so that Linux perf driver can
>>>>> utilize this to enable PMU.
>>>>> Signed-off-by: Atish Patra <atish.patra at wdc.com>
>>>>> ---
>>>>> arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 3 +++
>>>>> 1 file changed, 3 insertions(+)
>>>>> diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>>>>> index abbb960f90a0..b35b96b58820 100644
>>>>> --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>>>>> +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
>>>>> @@ -140,6 +140,9 @@ soc {
>>>>>             #size-cells = <2>;
>>>>>             compatible = "simple-bus";
>>>>>             ranges;
>>>>> +             pmu {
>>>>> +                     compatible = "riscv,pmu";
>>>>> +             };
>>>> This is a property of the user-replaceable firmware, not a property of
>>>> the hardware,
>>> It's a property of hardware that indicates that the hardware supports PMU.
>> All RISC-V hardware provides the CSRs, they’re part of the privileged
>> spec and not marked optional. How many aren’t hard-wired to zero is up
>> to the implementation. But even then you can’t know from the hardware
>> alone what is supported; the firmware has to enable S-mode (and
>> U-mode)’s ability to read them, so you can’t assume anything in a
>> static device tree hard-coded in Linux about what firmware has done.
>> Since you currently have to query the firmware to determine what’s
>> available to you anyway, I see no benefit from having a node in the
>> device tree that tells you your firmware *might* have counters you can
>> use.
>>> Additionally, the counter overflow interrupt number needs to be
>>> defined through the DT as well
>>> so that a clean platform driver can be implemented.
>> The interrupt number is specified as 13 by the Sscofmpf spec.
>> But that’s not relevant here, the FU740 predates and doesn’t implement
>> Sscofmpf, meaning there is no interrupt to even define here. And as I
>> said on the other patch, don’t conflate “SBI PMU firmware interface is
>> supported” and “Sscofmpf is implemented in the hardware”; the former
>> should be discovered by talking to firmware, and the latter should be
>> discovered like any other extension (however that ends up happening).
> Presence of sscof extension can be discovered through general extension
> discovery mechanism (probably a separate DT node..that's a separate discussion).
> However, the interrupt number discovery has to be through DT so the
> platform driver
> can probe the DT to figure out that.

No, you’re not reading what I said. It’s specified to be 13 in the
Sscofmpf spec, there is zero need to encode information in the device
tree that is already mandated by a specification. We don’t put that
supervisor software interrupts are 1 nor that supervisor timer
interrupts are 5 in the device tree, so we also don’t need to put that
supervisor counter overflow interrupts are 13 in it. We *do* currently
put machine timer interrupt information from the CLINT in the device
tree, and both supervisor and machine external interrupt information
from the PLIC, but that is not to tell you what’s already specified
(that they’re interrupts 7, 11 and 9 respectively), it’s to tell you
which order the per-hart registers are in in the CLINT, and which order
the contexts are in in the PLIC. If it were up to me that would’ve been
expressed a different way as it’s an ugly encoding, rather redundant
and not the nicest to decode in software, but it’s too late for that.
Though with the ACLINT, APLIC and other AIA parts on the horizon I hope
we can get saner bindings for those that don’t repeat those mistakes.
But the point is, if it’s specified by the spec, it doesn’t need to go
in the device tree, the device tree is for telling you all the things
you don’t, and can’t, already know.

>>>> so having this in the device tree under /soc, let alone
>>>> hard-coded in Linux, is utterly wrong. Why can this not just be probed
>>>> like any other SBI interface? The "Probe SBI extension" interface is
>>>> precisely for this kind of thing.
>>> SBI extension is anyways probed to verify if the firmware has PMU
>>> extension or not.
>>> However, adding the DT property allows different platforms (with or
>>> without sscof extension)
>>> to use the same code path.
>> You don’t need a device tree for that; that same code path can just be
>> “use the existing standard firmware interface”. That also has the
>> benefit that it’s not tied to device tree and so works identically for
>> ACPI, rather than needing an ACPI version of it.
> I don't disagree with that argument. However, we need a DT node for
> interrupt number as explained in the above.
> A DT based platform driver allows us to provide a unified code path
> which can handle both kinds of platforms described below.
> 1. Platforms without sscof extension
> 2. Platforms with sscof extension that requires a DT node for interrupt number
> Otherwise, the driver has to do the following things in order.
> 1. Probe PMU extension
> 2. first check if sscof extension is present in the special RISC-V ISA
> extension DT node (which is yet to finalize)
> 3. If sscof extension is present then register for a DT based platform driver.
> 4. Otherwise, register a simple platform driver.
> I am not completely opposed to doing that if there is a strong
> technical issue with the current approach.

Nope, it’s:

1. Probe PMU SBI extension
2. Register a driver
3. If Sscofmpf is present, register for interrupt 13

Or perhaps with 2 and 3 swapped.

You’re making this far too complicated by being fixated on needing
device tree in there somewhere. You don’t need it at all except
possibly to tell you that Sscofmpf is supported, which should be done
the same as any other supervisor extension like Svnapot or Svpbmt.


>> I see nothing here that can’t be discovered through pre-existing means.
>> If it can be discovered without use of the device tree then it does not
>> belong in the device tree; the device tree is purely for things that
>> cannot otherwise be discovered.
>> Jess
> -- 
> Regards,
> Atish

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