Query on clock speed change in FPGA

[Venkatakrishnan Sutharsan]

Hi,

I am right now working with RISCV based processor on FPGA where I
bootup linux on it. I am currently looking into the method of
increasing the clock speed on my FPGA. I have been looking into the
method of increasing the clock speed. Apart from increasing in the
FPGA file the DTS file needs to be updated for the Linux to know the
clock speed for its administration. I have looked into the
/arch/riscv/kernel/setup.c and /arch/riscv/kernel/cpu.c code and found
no attempts to read the clock frequency there. I have also checked
OpenRISC and found that they have functions that read the
clock-frequency and use that to calculate the loops_per_jiffy to
calibrate delay. Also, I am not able to see any details related to
speed when I do "cat /proc/cpuinfo". I assume that this issue is a
consequence of the previous where the clock-frequency is not fetched
from DT file. Is there any thing I am missing in this process of
increasing the CPU Clock Frequency in RISCV based processor with
Linux.

Thanks.

Regards,

Venkatakrishnan Sutharsan