[PATCH V2 1/2] dt-bindings: update riscv plic compatible string

Atish Patra atishp at atishpatra.org
Tue Oct 12 11:28:49 PDT 2021


On Tue, Oct 12, 2021 at 8:35 AM <guoren at kernel.org> wrote:
>
> From: Guo Ren <guoren at linux.alibaba.com>
>
> Add the compatible string "thead,c9xx-plic" to the riscv plic
> bindings to support SOCs with thead,c9xx processor cores.
>
> Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> Cc: Rob Herring <robh at kernel.org>
> Cc: Palmer Dabbelt <palmerdabbelt at google.com>
> Cc: Anup Patel <anup at brainfault.org>
> Cc: Atish Patra <atish.patra at wdc.com>
> ---
>  .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml         | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index 08d5a57ce00f..202eb7666f9b 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -46,6 +46,7 @@ properties:
>        - enum:
>            - sifive,fu540-c000-plic
>            - canaan,k210-plic
> +          - thead,c9xx-plic

I think it would be better to document the difference between sifive
plic and thead plic in
the description section.

>        - const: sifive,plic-1.0.0
>
>    reg:
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv



-- 
Regards,
Atish



More information about the linux-riscv mailing list