[PATCH 4/9] riscv: dts: microchip: Group tuples in interrupt properties

[Conor.Dooley at microchip.com]

On 25/11/2021 15:31, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> To improve human readability and enable automatic validation, the tuples
> in the various properties containing interrupt specifiers should be
> grouped.
> 
> Fix this by grouping the tuples of "interrupts" and
> "interrupts-extended" properties using angle brackets.
Hi Geert,
I notice most of the icicle kit patches in this series were feedback 
items from you on my series. I am assuming your intent is that I drop 
those from my V2 (which should've been here by now but other things got 
in the way) and base on this?
Thanks,
Conor.
> 
> Signed-off-by: Geert Uytterhoeven <geert at linux-m68k.org>
> ---
>   .../boot/dts/microchip/microchip-mpfs.dtsi    | 31 ++++++++++---------
>   1 file changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 794da883acb19256..d91226bfa586cda7 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -153,18 +153,18 @@ cache-controller at 2010000 {
>                          cache-size = <2097152>;
>                          cache-unified;
>                          interrupt-parent = <&plic>;
> -                       interrupts = <1 2 3>;
> +                       interrupts = <1>, <2>, <3>;
>                          reg = <0x0 0x2010000 0x0 0x1000>;
>                  };
> 
>                  clint at 2000000 {
>                          compatible = "sifive,fu540-c000-clint", "sifive,clint0";
>                          reg = <0x0 0x2000000 0x0 0xC000>;
> -                       interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
> -                                               &cpu1_intc 3 &cpu1_intc 7
> -                                               &cpu2_intc 3 &cpu2_intc 7
> -                                               &cpu3_intc 3 &cpu3_intc 7
> -                                               &cpu4_intc 3 &cpu4_intc 7>;
> +                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
> +                                             <&cpu1_intc 3>, <&cpu1_intc 7>,
> +                                             <&cpu2_intc 3>, <&cpu2_intc 7>,
> +                                             <&cpu3_intc 3>, <&cpu3_intc 7>,
> +                                             <&cpu4_intc 3>, <&cpu4_intc 7>;
>                  };
> 
>                  plic: interrupt-controller at c000000 {
> @@ -173,18 +173,19 @@ plic: interrupt-controller at c000000 {
>                          reg = <0x0 0xc000000 0x0 0x4000000>;
>                          riscv,ndev = <186>;
>                          interrupt-controller;
> -                       interrupts-extended = <&cpu0_intc 11
> -                                       &cpu1_intc 11 &cpu1_intc 9
> -                                       &cpu2_intc 11 &cpu2_intc 9
> -                                       &cpu3_intc 11 &cpu3_intc 9
> -                                       &cpu4_intc 11 &cpu4_intc 9>;
> +                       interrupts-extended = <&cpu0_intc 11>,
> +                                             <&cpu1_intc 11>, <&cpu1_intc 9>,
> +                                             <&cpu2_intc 11>, <&cpu2_intc 9>,
> +                                             <&cpu3_intc 11>, <&cpu3_intc 9>,
> +                                             <&cpu4_intc 11>, <&cpu4_intc 9>;
>                  };
> 
>                  dma at 3000000 {
>                          compatible = "sifive,fu540-c000-pdma";
>                          reg = <0x0 0x3000000 0x0 0x8000>;
>                          interrupt-parent = <&plic>;
> -                       interrupts = <23 24 25 26 27 28 29 30>;
> +                       interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>,
> +                                    <30>;
>                          #dma-cells = <1>;
>                  };
> 
> @@ -264,7 +265,7 @@ mmc: mmc at 20008000 {
>                          compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";
>                          reg = <0x0 0x20008000 0x0 0x1000>;
>                          interrupt-parent = <&plic>;
> -                       interrupts = <88 89>;
> +                       interrupts = <88>, <89>;
>                          clocks = <&clkcfg 6>;
>                          max-frequency = <200000000>;
>                          status = "disabled";
> @@ -274,7 +275,7 @@ emac0: ethernet at 20110000 {
>                          compatible = "cdns,macb";
>                          reg = <0x0 0x20110000 0x0 0x2000>;
>                          interrupt-parent = <&plic>;
> -                       interrupts = <64 65 66 67>;
> +                       interrupts = <64>, <65>, <66>, <67>;
>                          local-mac-address = [00 00 00 00 00 00];
>                          clocks = <&clkcfg 4>, <&clkcfg 2>;
>                          clock-names = "pclk", "hclk";
> @@ -287,7 +288,7 @@ emac1: ethernet at 20112000 {
>                          compatible = "cdns,macb";
>                          reg = <0x0 0x20112000 0x0 0x2000>;
>                          interrupt-parent = <&plic>;
> -                       interrupts = <70 71 72 73>;
> +                       interrupts = <70>, <71>, <72>, <73>;
>                          local-mac-address = [00 00 00 00 00 00];
>                          clocks = <&clkcfg 5>, <&clkcfg 2>;
>                          status = "disabled";
> --
> 2.25.1
>