[RESEND PATCH v1 0/2] Add Sv57 page table support

[panqinglin2020 at iscas.ac.cn]

From: Qinglin Pan <panqinglin2020 at iscas.ac.cn>

This patchset is based on Alex's Sv48 patchset v2.

This implements Sv57 support at runtime. The kernel will try to boot with
5-level page table firstly when the mmu-type field in dtb is "mmu,sv57" or null,
and will fallback to 4-level if the HW does not support it.

Tested on:
  - qemu rv64 sv39
  - qemu rv64 sv48
  - qemu rv64 sv57
  - Sifive unmatched

Qinglin Pan (2):
  riscv,mm: Add Sv57 support based on Sv48 implementation
  Documentation, mm: Add Sv57 vm layout documentation

 Documentation/riscv/vm-layout.rst   |  36 ++++++
 arch/riscv/Kconfig                  |   4 +-
 arch/riscv/include/asm/csr.h        |   1 +
 arch/riscv/include/asm/fixmap.h     |   1 +
 arch/riscv/include/asm/page.h       |   1 +
 arch/riscv/include/asm/pgalloc.h    |  49 ++++++++
 arch/riscv/include/asm/pgtable-64.h | 103 ++++++++++++++++-
 arch/riscv/include/asm/pgtable.h    |   4 +-
 arch/riscv/kernel/cpu.c             |   4 +-
 arch/riscv/mm/init.c                | 169 +++++++++++++++++++++++++---
 10 files changed, 348 insertions(+), 24 deletions(-)

-- 
2.32.0