[PATCH v2 0/4] Introduce pmu-events support for HiFive Unmatched

Jessica Clarke jrtc27 at jrtc27.com
Mon Nov 22 08:26:02 PST 2021


On 22 Nov 2021, at 14:57, João Mário Domingos <joao.mario at tecnico.ulisboa.pt> wrote:
> On Thu, Nov 18, 2021 at 12:00:09AM -0800, Atish Patra wrote:
>> On Wed, Nov 17, 2021 at 4:25 AM Nikita Shubin <nikita.shubin at maquefel.me> wrote:
>>> 
>>> On Tue, 16 Nov 2021 15:48:08 +0000
>>> João Mário Domingos <joao.mario at tecnico.ulisboa.pt> wrote:
>>> 
>>> Hello Mario!
>>> 
>>> Thank you for your patch series.
>>> 
>>> I have reproduced your test with some u-boot dts tinkering, and got
>>> similar results.
>>> 
>>> However,
>>> 
>>>> 
>>>> [1] https://github.com/atishp04/opensbi/tree/pmu_sscofpmf_v2
>>> 
>>> OpenSBI sscofpmf has been merged.
>>> 
>>>> [2] https://github.com/atishp04/u-boot/tree/hifive_unmatched_dt_pmu
>>>> [5]
>>>> https://github.com/atishp04/u-boot/blob/hifive_unmatched_dt_pmu/arch/riscv/dts/fu740-c000.dtsi
>>> 
>>> Is missing the adaptation for OpenSBI bitmap patch for
>>> "raw-event-to-mhpmcounters".
>> 
>> My patch was just an example and predates before the bitmap patch
>> posted by Vincent.
>> I will update the U-boot patch along with the next kernel version.
>> 
>>> 
>>>> [3] https://github.com/atishp04/linux/tree/riscv_pmu_v4
>>> 
>>> The link is broken.
>>> 
>> 
>> Sorry. This should be
>> https://github.com/atishp04/linux/tree/sbi_pmu_v4
>> 
>>>> [4]
>>>> http://lists.infradead.org/pipermail/linux-riscv/2021-October/009408.html
>>> 
>>>> [6]
>>>> https://patchwork.ozlabs.org/project/opensbi/patch/20211105013301.27656-1-vincent.chen@sifive.com/
>>>> 
>>> 
>>> There is a version 2 submitted, and it won't apply as require rebasing
>>> and some renaming.
>>> 
>>> Please share your u-boot dts changes - they should be small and provide
>>> a common base for this series.
>>> 
>> 
>> Yes. That would be really helpful to have a DT path with all the
>> entries for easier testing.
>> 
>> 
> 
> As the changes to the U-Boot are short I'm including them here, please tell me if I
> should include them in other way. I merged my changes with Atish's own
> patch to simplify the process.
> 
> diff -u b/arch/riscv/dts/fu740-c000.dtsi b/arch/riscv/dts/fu740-c000.dtsi
> --- b/arch/riscv/dts/fu740-c000.dtsi
> +++ b/arch/riscv/dts/fu740-c000.dtsi
> @@ -141,6 +141,49 @@
>                #size-cells = <2>;
>                compatible = "sifive,fu740-c000", "sifive,fu740", "simple-bus";
>                ranges;
> +               pmu {
> +                       compatible = "riscv,pmu";
> +                       pmu,raw-event-to-mhpmcounters = <0x00000000 0x00000100 0x18
> +                                                       0x00000000 0x00000200 0x18
> +                                                       0x00000000 0x00000400 0x18
> +                                                       0x00000000 0x00000800 0x18
> +                                                       0x00000000 0x00001000 0x18
> +                                                       0x00000000 0x00002000 0x18
> +                                                       0x00000000 0x00004000 0x18
> +                                                       0x00000000 0x00008000 0x18
> +                                                       0x00000000 0x00010000 0x18
> +                                                       0x00000000 0x00020000 0x18
> +                                                       0x00000000 0x00040000 0x18
> +                                                       0x00000000 0x00080000 0x18
> +                                                       0x00000000 0x00100000 0x18
> +                                                       0x00000000 0x00200000 0x18
> +                                                       0x00000000 0x00400000 0x18
> +                                                       0x00000000 0x00800000 0x18
> +                                                       0x00000000 0x01000000 0x18
> +                                                       0x00000000 0x02000000 0x18
> +                                                       0x00000000 0x00000101 0x18
> +                                                       0x00000000 0x00000201 0x18
> +                                                       0x00000000 0x00000401 0x18
> +                                                       0x00000000 0x00000801 0x18
> +                                                       0x00000000 0x00001001 0x18
> +                                                       0x00000000 0x00002001 0x18
> +                                                       0x00000000 0x00004001 0x18
> +                                                       0x00000000 0x00008001 0x18
> +                                                       0x00000000 0x00010001 0x18
> +                                                       0x00000000 0x00020001 0x18
> +                                                       0x00000000 0x00040001 0x18
> +                                                       0x00000000 0x00000102 0x18
> +                                                       0x00000000 0x00000202 0x18
> +                                                       0x00000000 0x00000402 0x18
> +                                                       0x00000000 0x00000802 0x18
> +                                                       0x00000000 0x00001002 0x18
> +                                                       0x00000000 0x00002002 0x18>;
> +                       pmu,event-to-mhpmcounters = <0x05 0x06 0x18
> +                                                    0x10009 0x10009 0x18>;
> +                       pmu,event-to-mhpmevent = <0x05 0x00000000 0x4000
> +                                                 0x06 0x00000000 0x4001
> +                                                 0x10008 0x00000000 0x102>;
> +               };
>                plic0: interrupt-controller at c000000 {
>                        #interrupt-cells = <1>;
>                        compatible = "sifive,plic-1.0.0”;

I still highly disagree with this. The presence of the SBI PMU
extension is a property of the firmware, not the SoC, so it has no
place in /soc. Moreover its existence can be probed via the
sbi_probe_extension SBI call. It is already discoverable.

See my responses to Atish’s patches for more details.

Jess




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