[PATCH v2 0/4] Introduce pmu-events support for HiFive Unmatched

[Atish Patra]

On Wed, Nov 17, 2021 at 4:25 AM Nikita Shubin <nikita.shubin at maquefel.me> wrote:
>
> On Tue, 16 Nov 2021 15:48:08 +0000
> João Mário Domingos <joao.mario at tecnico.ulisboa.pt> wrote:
>
> Hello Mario!
>
> Thank you for your patch series.
>
> I have reproduced your test with some u-boot dts tinkering, and got
> similar results.
>
> However,
>
> >
> > [1] https://github.com/atishp04/opensbi/tree/pmu_sscofpmf_v2
>
> OpenSBI sscofpmf has been merged.
>
> > [2] https://github.com/atishp04/u-boot/tree/hifive_unmatched_dt_pmu
> > [5]
> > https://github.com/atishp04/u-boot/blob/hifive_unmatched_dt_pmu/arch/riscv/dts/fu740-c000.dtsi
>
> Is missing the adaptation for OpenSBI bitmap patch for
> "raw-event-to-mhpmcounters".

My patch was just an example and predates before the bitmap patch
posted by Vincent.
I will update the U-boot patch along with the next kernel version.

>
> > [3] https://github.com/atishp04/linux/tree/riscv_pmu_v4
>
> The link is broken.
>

Sorry. This should be
https://github.com/atishp04/linux/tree/sbi_pmu_v4

> > [4]
> > http://lists.infradead.org/pipermail/linux-riscv/2021-October/009408.html
>
> > [6]
> > https://patchwork.ozlabs.org/project/opensbi/patch/20211105013301.27656-1-vincent.chen@sifive.com/
> >
>
> There is a version 2 submitted, and it won't apply as require rebasing
> and some renaming.
>
> Please share your u-boot dts changes - they should be small and provide
> a common base for this series.
>

Yes. That would be really helpful to have a DT path with all the
entries for easier testing.


> Tested-by: Nikita Shubin <n.shubin at yadro.com>
>
> > Signed-off-by: João Mário Domingos <joao.mario at tecnico.ulisboa.pt>
> >
> > This work was developed at INESC-ID, Instituto Superior Técnico,
> > Universidade de Lisboa.
> >
> > ---
> > Changes in v2:
> >   - Fix compilation errors and warnings
> >   - Remove space idents
> >   - Correct formatting



> >
> > João Mário Domingos (4):
> >   RISC-V: Create unique identification for SoC PMU
> >   RISC-V: Support CPUID for risc-v in perf
> >   RISC-V: Added generic pmu-events mapfile
> >   RISC-V: Added HiFive Unmatched PMU events
> >
> >  arch/riscv/kernel/sbi.c                       |  3 +
> >  drivers/perf/riscv_pmu.c                      | 18 ++++
> >  drivers/perf/riscv_pmu_sbi.c                  | 47 ++++++++++
> >  tools/perf/arch/riscv/util/Build              |  1 +
> >  tools/perf/arch/riscv/util/header.c           | 66 +++++++++++++
> >  tools/perf/pmu-events/arch/riscv/mapfile.csv  | 15 +++
> >  .../pmu-events/arch/riscv/riscv-generic.json  | 20 ++++
> >  .../arch/riscv/sifive/u74/instructions.json   | 92
> > +++++++++++++++++++ .../arch/riscv/sifive/u74/memory.json         |
> > 32 +++++++ .../arch/riscv/sifive/u74/microarch.json      | 57
> > ++++++++++++ 10 files changed, 351 insertions(+)
> >  create mode 100644 tools/perf/arch/riscv/util/header.c
> >  create mode 100644 tools/perf/pmu-events/arch/riscv/mapfile.csv
> >  create mode 100644
> > tools/perf/pmu-events/arch/riscv/riscv-generic.json create mode
> > 100644 tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json
> > create mode 100644
> > tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json create mode
> > 100644 tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json
> >
>
>
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-- 
Regards,
Atish