arch/riscv/staging

Damien Le Moal Damien.LeMoal at wdc.com
Thu May 20 19:08:37 PDT 2021


[resending, I used Palmer's old email address]

Palmer,

I hope you are doing well. It would be great if you could be more active on the
list and share your views about the current situation regarding
unreasonably-late specification freezing and kernel patch acceptance policy.

For the hypervisor extension and KVM support, the specifications are now very
stable and while changes due to the advanced interrupt controller specs work,
among other, are still possible, the changes will likely be small and should not
cause much headache in the kernel. Given that there is already HW (and QEMU)
supporting H extension, we really need to move forward with merging riscv KVM
support. That will reduce the risk of seeing forks pop out here and there and
greatly facilitate Paolo and Anup work.

For this, I propose that we create arch/riscv/staging as a temporary location
for on-going work for supporting ISA extensions that are being drafted but not
yet frozen. That will allow the community to share a common code base for the
support code, and also allow more eyes to look at the extension themselves.
This way we can both facilitate and accelerate riscv ecosystem development while
also speeding up the specification work by providing constant feedback.

If managing this staging ground is too much work for you, I am sure that Anup
could handle it as a sub-maintainer.

Thoughts ?

Note: this needs a resolution ASAP. So please respond.

Best regards.



-- 
Damien Le Moal
Western Digital Research



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