[PATCH v4 0/5] Add support for the PolarFire SoC system controller
Conor.Dooley at microchip.com
Conor.Dooley at microchip.com
Tue Mar 30 12:06:44 BST 2021
On 30/03/2021 05:17, Palmer Dabbelt wrote:
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>
> On Thu, 11 Mar 2021 03:34:31 PST (-0800), conor.dooley at microchip.com
> wrote:
>> From: Conor Dooley <conor.dooley at microchip.com>
>>
>> This patch series adds support for the system controller on
>> the PolarFire SoC, using the mailbox framework. A Microchip directory
>> in the SoC subsystem has been created to hold the mailbox client
>> driver and will be used for future service drivers.
>>
>> These drivers are gated by the kconfig option:
>> CONFIG_SOC_MICROCHIP_POLARFIRE, so this patch series depends on Atish
>> Patra's PolarFire SoC support patches which introduce it.
>>
>> It further depends on the MAINTAINERS entry created in the same series.
>>
>> Changes from v3:
>> * Fixed mboxes reference in dt binding for mailbox client
>> * Bug fixes and cleanup from Jonathan Neuschäfer's feedback on
>> mailbox-mpfs.c & mpfs-sys-controller.c
>> * Renamed dt binding files to match compatible strings
>> * Removed PFSoC gating condition on drivers/soc/microchip subdirectory
>> * Converted all size based operations to bytes for consistency
>> * Converted response array to a structure, enabling support for more
>> complex services that return a status instead of/alongside a payload.
>>
>> Changes from v2:
>> * Further reworked dt bindings to satisfy errors and feedback
>> (hopefully phandle array is the correct type for the mboxes)
>> * Full maintainers entry moved to Atish's PFSoC support series, this
>> series now only adds mailbox driver
>> * Converted config options from MPFS to POLARFIRE_SOC so they are
>> more recognisable
>> * Further simplified driver code from feedback
>>
>> Changes from v1:
>> * Squashed header into first patch
>> * Fixed DT binding warnings & small fixes
>> * Cleaned up drivers from feedback
>>
>> Conor Dooley (5):
>> mbox: add polarfire soc system controller mailbox
>> dt-bindings: add bindings for polarfire soc mailbox
>> soc: add polarfire soc system controller
>> dt-bindings: add bindings for polarfire soc system controller
>> MAINTAINERS: add entry for polarfire soc mailbox driver
>>
>> .../microchip,polarfire-soc-mailbox.yaml | 47 +++
>> ...icrochip,polarfire-soc-sys-controller.yaml | 36 +++
>> MAINTAINERS | 1 +
>> drivers/mailbox/Kconfig | 12 +
>> drivers/mailbox/Makefile | 2 +
>> drivers/mailbox/mailbox-mpfs.c | 277 ++++++++++++++++++
>> drivers/soc/Kconfig | 1 +
>> drivers/soc/Makefile | 1 +
>> drivers/soc/microchip/Kconfig | 10 +
>> drivers/soc/microchip/Makefile | 1 +
>> drivers/soc/microchip/mpfs-sys-controller.c | 127 ++++++++
>> include/soc/microchip/mpfs.h | 57 ++++
>> 12 files changed, 572 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml
>> create mode 100644
>> Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
>> create mode 100644 drivers/mailbox/mailbox-mpfs.c
>> create mode 100644 drivers/soc/microchip/Kconfig
>> create mode 100644 drivers/soc/microchip/Makefile
>> create mode 100644 drivers/soc/microchip/mpfs-sys-controller.c
>> create mode 100644 include/soc/microchip/mpfs.h
>
> The only problem I see here is that patch #3 (the driver for the system
> controller) comes before patch #4 (the DT bindings for that driver).
> That
> triggers a checkpatch warning. I can just reorder it, but it would be
> great to
> have some reviews from the DT and mailbox people. If not I'll try and
> find
> some time to take a closer look.
I've had a fair bit of back and forth with Rob about the dt bindings,
hopefully this version he happy with - think all of his concerns have
now been addressed. Haven't heard anything from Jassi Brar on the device
tree side however
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