[PATCH] implement flush_cache_vmap and flush_cache_vunmap for RISC-V
Alex Ghiti
alex at ghiti.fr
Tue Mar 30 08:02:50 BST 2021
Hi Jiuyang,
Le 3/28/21 à 9:55 PM, Jiuyang Liu a écrit :
> This patch implements flush_cache_vmap and flush_cache_vunmap for
> RISC-V, since these functions might modify PTE. Without this patch,
> SFENCE.VMA won't be added to related codes, which might introduce a bug
> in some out-of-order micro-architecture implementations.
>
> Signed-off-by: Jiuyang Liu <liu at jiuyang.me>
> ---
> arch/riscv/include/asm/cacheflush.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> index 23ff70350992..4adf25248c43 100644
> --- a/arch/riscv/include/asm/cacheflush.h
> +++ b/arch/riscv/include/asm/cacheflush.h
> @@ -8,6 +8,14 @@
>
> #include <linux/mm.h>
>
> +/*
> + * flush_cache_vmap and flush_cache_vunmap might modify PTE, needs SFENCE.VMA.
"might modify PTE" is not entirely true I think, this is what happens
before using this function that might modify PTE, those functions ensure
those modifications are made visible.
> + * - flush_cache_vmap is invoked after map_kernel_range() has installed the page table entries.
> + * - flush_cache_vunmap is invoked before unmap_kernel_range() deletes the page table entries
> + */
> +#define flush_cache_vmap(start, end) flush_tlb_all()
> +#define flush_cache_vunmap(start, end) flush_tlb_all()
> +
> static inline void local_flush_icache_all(void)
> {
> asm volatile ("fence.i" ::: "memory");
>
FWIW, you can add:
Reviewed-by: Alexandre Ghiti <alex at ghiti.fr>
Thanks,
Alex
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