[PATCH 1/9] riscv: traps: Fix no prototype warnings

[Palmer Dabbelt]

On Fri, 05 Mar 2021 03:33:24 PST (-0800), sunnanyong at huawei.com wrote:
> Fix all W=1 compilation warnings:'no previous prototype for' in arch/riscv/kernel/traps.c:
> arch/riscv/kernel/traps.c:96:15: warning: no previous prototype for ‘do_trap_unknown’ [-Wmissing-prototypes]
>    96 | DO_ERROR_INFO(do_trap_unknown,
>       |               ^~~~~~~~~~~~~~~
> arch/riscv/kernel/traps.c:91:27: note: in definition of macro ‘DO_ERROR_INFO’
>    91 | asmlinkage __visible void name(struct pt_regs *regs)   \
>       |                           ^~~~
> arch/riscv/kernel/traps.c:98:15: warning: no previous prototype for ‘do_trap_insn_misaligned’ [-Wmissing-prototypes]
>    98 | DO_ERROR_INFO(do_trap_insn_misaligned,
>       |               ^~~~~~~~~~~~~~~~~~~~~~~
> arch/riscv/kernel/traps.c:91:27: note: in definition of macro ‘DO_ERROR_INFO’
>    91 | asmlinkage __visible void name(struct pt_regs *regs)   \
>       |                           ^~~~
> arch/riscv/kernel/traps.c:100:15: warning: no previous prototype for ‘do_trap_insn_fault’ [-Wmissing-prototypes]
> ...
>
> Reported-by: Hulk Robot <hulkci at huawei.com>
> Signed-off-by: Nanyong Sun <sunnanyong at huawei.com>
> ---
>  arch/riscv/include/asm/asm-prototypes.h | 16 ++++++++++++++++
>  arch/riscv/kernel/traps.c               |  1 +
>  2 files changed, 17 insertions(+)
>
> diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h
> index 27e005fca584..6d81abf5d9f8 100644
> --- a/arch/riscv/include/asm/asm-prototypes.h
> +++ b/arch/riscv/include/asm/asm-prototypes.h
> @@ -9,4 +9,20 @@ long long __lshrti3(long long a, int b);
>  long long __ashrti3(long long a, int b);
>  long long __ashlti3(long long a, int b);
>
> +
> +#define DECLARE_DO_ERROR_INFO(name)	asmlinkage void name(struct pt_regs *regs);

This triggers checkpatch.

> +
> +DECLARE_DO_ERROR_INFO(do_trap_unknown)
> +DECLARE_DO_ERROR_INFO(do_trap_insn_misaligned)
> +DECLARE_DO_ERROR_INFO(do_trap_insn_fault)
> +DECLARE_DO_ERROR_INFO(do_trap_insn_illegal)
> +DECLARE_DO_ERROR_INFO(do_trap_load_fault)
> +DECLARE_DO_ERROR_INFO(do_trap_load_misaligned)
> +DECLARE_DO_ERROR_INFO(do_trap_store_misaligned)
> +DECLARE_DO_ERROR_INFO(do_trap_store_fault)
> +DECLARE_DO_ERROR_INFO(do_trap_ecall_u)
> +DECLARE_DO_ERROR_INFO(do_trap_ecall_s)
> +DECLARE_DO_ERROR_INFO(do_trap_ecall_m)
> +DECLARE_DO_ERROR_INFO(do_trap_break)
> +
>  #endif /* _ASM_RISCV_PROTOTYPES_H */
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index 3ed2c23601a0..0879b5df11b9 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -17,6 +17,7 @@
>  #include <linux/module.h>
>  #include <linux/irq.h>
>
> +#include <asm/asm-prototypes.h>
>  #include <asm/bug.h>
>  #include <asm/processor.h>
>  #include <asm/ptrace.h>