[RFC PATCH v1 00/10] RISC-V ACLINT Support
Anup Patel
anup.patel at wdc.com
Sat Jun 12 09:04:12 PDT 2021
Most of the existing RISC-V platforms use SiFive CLINT to provide M-level
timer and IPI support whereas S-level uses SBI calls for timer and IPI
support. Also, the SiFive CLINT device is a single device providing both
timer and IPI functionality so RISC-V platforms can't partially implement
SiFive CLINT device and provide alternate mechanism for timer and IPI.
The RISC-V Advacned Core Local Interruptor (ACLINT) tries to address the
limitations of SiFive CLINT by:
1) Taking modular approach and defining timer and IPI functionality as
separate devices so that RISC-V platforms can include only required
devices
2) Providing dedicated MMIO device for S-level IPIs so that SBI calls
can be avoided for IPIs in Linux RISC-V
3) Allowing multiple instances of timer and IPI devices for a
multi-socket (or multi-die) NUMA systems
4) Being backward compatible to SiFive CLINT so that existing RISC-V
platforms stay compliant with RISC-V ACLINT specification
Latest RISC-V ACLINT specification (will be frozen in a month) can be
found at:
https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc
This series adds RISC-V ACLINT support and can be found in riscv_aclint_v1
branch at:
https://github.com/avpatel/linux
To test this series, the RISC-V ACLINT support for QEMU and OpenSBI
can be found in the riscv_aclint_v1 branch at:
https://github.com/avpatel/qemu
https://github.com/avpatel/opensbi
Anup Patel (10):
RISC-V: Clear SIP bit only when using SBI IPI operations
RISC-V: Use common print prefix in smp.c
RISC-V: Allow more details in IPI operations
RISC-V: Use IPIs for remote TLB flush when possible
irqchip: Add ACLINT software interrupt driver
RISC-V: Select ACLINT SWI driver for virt machine
clocksource: clint: Add support for ACLINT MTIMER device
dt-bindings: timer: Add ACLINT MTIMER bindings
dt-bindings: timer: Add ACLINT MSWI and SSWI bindings
MAINTAINERS: Add entry for RISC-V ACLINT drivers
.../riscv,aclint-swi.yaml | 82 ++++++++++++
.../bindings/timer/riscv,aclint-mtimer.yaml | 55 ++++++++
MAINTAINERS | 9 ++
arch/riscv/Kconfig.socs | 1 +
arch/riscv/include/asm/smp.h | 15 +++
arch/riscv/kernel/sbi.c | 10 +-
arch/riscv/kernel/smp.c | 36 +++++-
arch/riscv/mm/cacheflush.c | 2 +-
arch/riscv/mm/tlbflush.c | 62 +++++++--
drivers/clocksource/timer-clint.c | 45 +++++--
drivers/irqchip/Kconfig | 11 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-aclint-swi.c | 122 ++++++++++++++++++
13 files changed, 415 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aclint-swi.yaml
create mode 100644 Documentation/devicetree/bindings/timer/riscv,aclint-mtimer.yaml
create mode 100644 drivers/irqchip/irq-aclint-swi.c
--
2.25.1
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