[PATCH RFC 0/3] riscv: Add DMA_COHERENT support

Guo Ren guoren at kernel.org
Mon Jun 7 00:46:16 PDT 2021

On Mon, Jun 7, 2021 at 2:51 PM Christoph Hellwig <hch at lst.de> wrote:
> On Mon, Jun 07, 2021 at 02:41:14PM +0800, Guo Ren wrote:
> > Double/Triple the size of physical memory regions can't be accepted by
> > SOC vendors, because it wastes HW resources.
> > Some cost-down soc interconnects only have 32bit~34bit width of
> > physical address, are you sure you could force them to expand it? (I
> > can't)
> >
> > > or somewhat dynamic.
> > How can HW implement with dynamic modifying PMA? What's the granularity?
> I'm just stating the requirements from the Linux DMA perspective.  You
> also do not need tripple the address space, just double.

With double, you only got "strong order + non-cache" for the DMA
descriptor. How about write-combine scenario?

Even, double physical memory address space also wastes HW resources.

Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/

More information about the linux-riscv mailing list