[PATCH 1/1] RISC-V: load initrd wherever it fits into memory

Atish Patra atishp at atishpatra.org
Fri Jul 2 12:11:17 PDT 2021


On Wed, Jun 30, 2021 at 12:30 AM Ard Biesheuvel <ardb at kernel.org> wrote:
>
> On Wed, 30 Jun 2021 at 00:56, Atish Patra <atishp at atishpatra.org> wrote:
> >
> > On Tue, Jun 29, 2021 at 6:40 AM Heinrich Schuchardt <xypron.glpk at gmx.de> wrote:
> > >
> > > Requiring that initrd is loaded below RAM start + 256 MiB led to failure
> > > to boot SUSE Linux with GRUB on QEMU, cf.
> > > https://lists.gnu.org/archive/html/grub-devel/2021-06/msg00037.html
> > >
> > > Remove the constraint.
> > >
> > > Reported-by: Andreas Schwab <schwab at linux-m68k.org>
> > > Signed-off-by: Heinrich Schuchardt <xypron.glpk at gmx.de>
> > > ---
> > >  arch/riscv/include/asm/efi.h | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/riscv/include/asm/efi.h b/arch/riscv/include/asm/efi.h
> > > index 7542282f1141..649ab513dc99 100644
> > > --- a/arch/riscv/include/asm/efi.h
> > > +++ b/arch/riscv/include/asm/efi.h
> > > @@ -33,10 +33,10 @@ static inline unsigned long efi_get_max_fdt_addr(unsigned long image_addr)
> > >
> > >  #define ARCH_EFI_IRQ_FLAGS_MASK (SR_IE | SR_SPIE)
> > >
> > > -/* Load initrd at enough distance from DRAM start */
> > > +/* Load initrd anywhere in system RAM */

Alex/Anup/Palmer:

As per my understanding initrd can be loaded in system RAM as long as
it doesn't overwrite the existing data (fdt/kernel image)
and respect reserved memory regions.

Let us know if we have any inherent memory location limitation for
initrd loading.


> > >  static inline unsigned long efi_get_max_initrd_addr(unsigned long image_addr)
> > >  {
> > > -       return image_addr + SZ_256M;
> > > +       return ULONG_MAX;
> > >  }
> > >
> > >  #define alloc_screen_info(x...)                (&screen_info)
> > > --
> > > 2.30.2
> > >
> >
> > LGTM
> >
> > Reviewed-by: Atish Patra <atish.patra at wdc.com>
> >
>
> Acked-by: Ard Biesheuvel <ardb at kernel.org>
>
> Please take this via the RISC-V tree.



--
Regards,
Atish



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