[PATCH v13 01/17] clk: Add RISC-V Canaan Kendryte K210 clock driver
Damien Le Moal
Damien.LeMoal at wdc.com
Sat Jan 23 01:24:34 EST 2021
On 2021/01/18 11:03, Damien Le Moal wrote:
> Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC.
> This new driver with the compatible string "canaan,k210-clk" implements
> support for the full clock structure of the K210 SoC. Since it is
> required for the correct operation of the SoC, this driver is
> selected by default for compilation when the SOC_CANAAN option is
> selected.
>
> With this change, the k210-sysctl driver is turned into a simple
> platform driver which enables its power bus clock and triggers
> populating its child nodes. The sysctl driver retains the SOC early
> initialization code, but the implementation now relies on the new
> function k210_clk_early_init() provided by the new clk-k210 driver.
>
> The clock structure implemented and many of the coding ideas for the
> driver come from the work by Sean Anderson on the K210 support for the
> U-Boot project.
>
> Cc: Stephen Boyd <sboyd at kernel.org>
> Cc: Michael Turquette <mturquette at baylibre.com>
> Cc: linux-clk at vger.kernel.org
> Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
> ---
> MAINTAINERS | 1 +
> drivers/clk/Kconfig | 8 +
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-k210.c | 1012 ++++++++++++++++++++++++++++++
> drivers/soc/canaan/Kconfig | 18 +-
> drivers/soc/canaan/Makefile | 2 +-
> drivers/soc/canaan/k210-sysctl.c | 205 ++----
> include/soc/canaan/k210-sysctl.h | 2 +
> 8 files changed, 1071 insertions(+), 178 deletions(-)
> create mode 100644 drivers/clk/clk-k210.c
Stephen,
Ping ? Could you review this version please ?
I addressed all your comments, except the addition of a timeout in the pll lock
wait loop. The reason is that if the hardware misbehave there, the CPU and/or
third SRAM bank are likely to not work either and the board will not even boot
(it will hang in the early soc init code). So I do not think adding a timeout is
useful.
--
Damien Le Moal
Western Digital Research
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