[PATCH v14 07/16] dt-bindings: fix sifive gpio properties

[Damien Le Moal]

On Tue, 2021-02-02 at 13:02 -0600, Rob Herring wrote:
> On Tue, Feb 2, 2021 at 4:36 AM Damien Le Moal <damien.lemoal at wdc.com> wrote:
> > 
> > The sifive gpio IP block supports up to 32 GPIOs. Reflect that in the
> > interrupts property description and maxItems. Also add the standard
> > ngpios property to describe the number of GPIOs available on the
> > implementation.
> > 
> > Also add the "canaan,k210-gpiohs" compatible string to indicate the use
> > of this gpio controller in the Canaan Kendryte K210 SoC. If this
> > compatible string is used, do not define the clocks property as
> > required as the K210 SoC does not have a software controllable clock
> > for the Sifive gpio IP block.
> > 
> > Cc: Paul Walmsley <paul.walmsley at sifive.com>
> > Cc: Rob Herring <robh at kernel.org>
> > Cc: devicetree at vger.kernel.org
> > Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
> > ---
> >  .../devicetree/bindings/gpio/sifive,gpio.yaml | 21 ++++++++++++++++---
> >  1 file changed, 18 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
> > index ab22056f8b44..2cef18ca737c 100644
> > --- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
> > +++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
> > @@ -16,6 +16,7 @@ properties:
> >        - enum:
> >            - sifive,fu540-c000-gpio
> >            - sifive,fu740-c000-gpio
> > +          - canaan,k210-gpiohs
> >        - const: sifive,gpio0
> > 
> >    reg:
> > @@ -23,9 +24,9 @@ properties:
> > 
> >    interrupts:
> >      description:
> > -      interrupt mapping one per GPIO. Maximum 16 GPIOs.
> > +      interrupt mapping one per GPIO. Maximum 32 GPIOs.
> >      minItems: 1
> > -    maxItems: 16
> > +    maxItems: 32
> > 
> >    interrupt-controller: true
> > 
> > @@ -38,6 +39,10 @@ properties:
> >    "#gpio-cells":
> >      const: 2
> > 
> > +  ngpios:
> > +    minimum: 1
> > +    maximum: 32
> 
> What's the default as obviously drivers already assume something.
> 
> Does a driver actually need to know this? For example, does the
> register stride change or something?
> 
> Please don't add it if the only purpose is error check your DT (IOW,
> if it just checks the max cell value in gpios phandles).

If I remove that, make dtbs_check complains. Looking at othe gpio controller
bindings, they all have it. So isn't it better to be consistent, and avoid make
dtbs_check errors ?


> 
> Rob

-- 
Damien Le Moal
Western Digital Research