[PATCH] dt-bindings: PCI: designware: Fix 'unevaluatedProperties' warnings

[Rob Herring]

On Mon, 06 Dec 2021 13:44:25 -0600, Rob Herring wrote:
> With 'unevaluatedProperties' support implemented, there's a number of
> warnings from the Designware PCIe based bindings:
> 
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie at 1ffc000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'device_type', 'bus-range', 'ranges', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie at 1ffc000: Unevaluated properties are not allowed ('clock-names' was unexpected)
> Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie at f4000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'clocks', 'clock-names' were unexpected)
> Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie at f4000000: Unevaluated properties are not allowed ('clock-names' was unexpected)
> Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie at f5000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'phys', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'reset-gpios', 'pcie at 0,0' were unexpected)
> Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie at f5000000: Unevaluated properties are not allowed ('phys', 'hisilicon,clken-gpios' were unexpected)
> Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie at d0e00000: Unevaluated properties are not allowed ('device_type', '#address-cells', '#size-cells', 'linux,pci-domain', 'bus-range', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
> Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie at d0e00000: Unevaluated properties are not allowed ('resets', 'phys', 'phy-names', 'reset-assert-ms' were unexpected)
> Documentation/devicetree/bindings/pci/rockchip-dw-pcie.example.dt.yaml: pcie at fe280000: Unevaluated properties are not allowed ('clock-names', 'msi-map', 'phys', 'phy-names', 'power-domains', 'resets', 'reset-names' were unexpected)
> Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie at 15700000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'bus-range', 'ranges', 'interrupt-map-mask', 'interrupt-map' were unexpected)
> Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie at 15700000: Unevaluated properties are not allowed ('clock-names', 'phys', 'vdd10-supply', 'vdd18-supply' were unexpected)
> Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie at e00000000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'dma-coherent', 'bus-range', 'ranges', 'interrupts', 'interrupt-parent', 'interrupt-map-mask', 'interrupt-map', 'clock-names', 'clocks' were unexpected)
> Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie at e00000000: Unevaluated properties are not allowed ('dma-coherent', 'clock-names', 'resets', 'pwren-gpios' were unexpected)
> Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.example.dt.yaml: pcie-ep at 66000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'reset-names', 'resets', 'phy-names', 'phys' were unexpected)
> Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie at 28400000: Unevaluated properties are not allowed ('clock-names' was unexpected)
> Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie at 28400000: Unevaluated properties are not allowed ('device_type', 'bus-range', 'num-viewport', '#address-cells', '#size-cells', '#interrupt-cells', 'ranges', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'max-link-speed' were unexpected)
> 
> The main problem is that snps,dw-pcie.yaml and snps,dw-pcie-ep.yaml
> shouldn't set 'unevaluatedProperties: false'. Otherwise, bindings that
> reference them cannot add additional properties. With that addressed,
> there's a handful of other undocumented properties to add.
> 
> Cc: Xiaowei Song <songxiaowei at hisilicon.com>
> Cc: Binghui Wang <wangbinghui at hisilicon.com>
> Cc: Bjorn Helgaas <bhelgaas at google.com>
> Cc: Paul Walmsley <paul.walmsley at sifive.com>
> Cc: Greentime Hu <greentime.hu at sifive.com>
> Cc: Palmer Dabbelt <palmer at dabbelt.com>
> Cc: Jingoo Han <jingoohan1 at gmail.com>
> Cc: Gustavo Pimentel <gustavo.pimentel at synopsys.com>
> Cc: linux-pci at vger.kernel.org
> Cc: linux-riscv at lists.infradead.org
> Signed-off-by: Rob Herring <robh at kernel.org>
> ---
>  .../bindings/pci/hisilicon,kirin-pcie.yaml          | 13 +++++++++++++
>  .../devicetree/bindings/pci/sifive,fu740-pcie.yaml  |  4 ++--
>  .../devicetree/bindings/pci/snps,dw-pcie-ep.yaml    |  2 +-
>  .../devicetree/bindings/pci/snps,dw-pcie.yaml       |  2 +-
>  .../bindings/pci/socionext,uniphier-pcie-ep.yaml    |  2 +-
>  5 files changed, 18 insertions(+), 5 deletions(-)
> 

Applied, thanks!