[PATCH v9 03/17] riscv: Extending cpufeature.c to detect V-extension

[Palmer Dabbelt]

On Tue, 09 Nov 2021 01:48:15 PST (-0800), greentime.hu at sifive.com wrote:
> From: Guo Ren <ren_guo at c-sky.com>
>
> Current cpufeature.c doesn't support detecting V-extension, because
> "rv64" also contain a 'v' letter and we need to skip it.
>
> Signed-off-by: Guo Ren <ren_guo at c-sky.com>
> Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> Reviewed-by: Anup Patel <anup at brainfault.org>
> Reviewed-by: Greentime Hu <greentime.hu at sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu at sifive.com>
> ---
>  arch/riscv/include/uapi/asm/hwcap.h | 1 +
>  arch/riscv/kernel/cpufeature.c      | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/asm/hwcap.h
> index 46dc3f5ee99f..c52bb7bbbabe 100644
> --- a/arch/riscv/include/uapi/asm/hwcap.h
> +++ b/arch/riscv/include/uapi/asm/hwcap.h
> @@ -21,5 +21,6 @@
>  #define COMPAT_HWCAP_ISA_F	(1 << ('F' - 'A'))
>  #define COMPAT_HWCAP_ISA_D	(1 << ('D' - 'A'))
>  #define COMPAT_HWCAP_ISA_C	(1 << ('C' - 'A'))
> +#define COMPAT_HWCAP_ISA_V	(1 << ('V' - 'A'))
>
>  #endif /* _UAPI_ASM_RISCV_HWCAP_H */
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index d959d207a40d..7069e55335d0 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -73,6 +73,7 @@ void __init riscv_fill_hwcap(void)
>  	isa2hwcap['f'] = isa2hwcap['F'] = COMPAT_HWCAP_ISA_F;
>  	isa2hwcap['d'] = isa2hwcap['D'] = COMPAT_HWCAP_ISA_D;
>  	isa2hwcap['c'] = isa2hwcap['C'] = COMPAT_HWCAP_ISA_C;
> +	isa2hwcap['v'] = isa2hwcap['V'] = COMPAT_HWCAP_ISA_V;
>
>  	elf_hwcap = 0;

Reviewed-by: Palmer Dabbelt <palmer at rivosinc.com>