[PATCH] riscv: Improve stack randomisation on RV64
Kefeng Wang
wangkefeng.wang at huawei.com
Thu Aug 12 04:47:02 PDT 2021
54c95a11cc1b ("riscv: make mmap allocation top-down by default") support
ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT, which will select ARCH_HAS_ELF_RANDOMIZE
from commit e7142bf5d231 ("arm64, mm: make randomization selected by generic
topdown mmap layout"), so riscv has support ELF ASLR feature, update the
documentation.
And enlarge STACK_RND_MASK from 8M to 1G to increase stack randomisation
on RV64 like x86/arm64 does.
Cc: Alexandre Ghiti <alex at ghiti.fr>
Signed-off-by: Kefeng Wang <wangkefeng.wang at huawei.com>
---
Documentation/features/vm/ELF-ASLR/arch-support.txt | 2 +-
arch/riscv/include/asm/elf.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/features/vm/ELF-ASLR/arch-support.txt b/Documentation/features/vm/ELF-ASLR/arch-support.txt
index 99cb6d7f5005..2949c99fbb2f 100644
--- a/Documentation/features/vm/ELF-ASLR/arch-support.txt
+++ b/Documentation/features/vm/ELF-ASLR/arch-support.txt
@@ -22,7 +22,7 @@
| openrisc: | TODO |
| parisc: | ok |
| powerpc: | ok |
- | riscv: | TODO |
+ | riscv: | ok |
| s390: | ok |
| sh: | TODO |
| sparc: | TODO |
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f4b490cd0e5d..f53c40026c7a 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -42,6 +42,9 @@
*/
#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2)
+#ifdef CONFIG_64BIT
+#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12))
+#endif
/*
* This yields a mask that user programs can use to figure out what
* instruction set this CPU supports. This could be done in user space,
--
2.26.2
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