[PATCH] riscv: add ARCH_DMA_MINALIGN support

[Guo Ren]

On Mon, Aug 9, 2021 at 9:55 AM Xianting TIan
<xianting.tian at linux.alibaba.com> wrote:
>
>
> 在 2021/8/9 上午12:30, Jisheng Zhang 写道:
> > On Sat,  7 Aug 2021 22:55:37 +0800
> > Xianting Tian <xianting.tian at linux.alibaba.com> wrote:
> >
> >> Introduce ARCH_DMA_MINALIGN to riscv arch.
> >>
> >> Signed-off-by: Xianting Tian <xianting.tian at linux.alibaba.com>
> >> ---
> >>   arch/riscv/include/asm/cache.h | 2 ++
> >>   1 file changed, 2 insertions(+)
> >>
> >> diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
> >> index 9b58b1045..2945bbe2b 100644
> >> --- a/arch/riscv/include/asm/cache.h
> >> +++ b/arch/riscv/include/asm/cache.h
> >> @@ -11,6 +11,8 @@
> >>
> >>   #define L1_CACHE_BYTES             (1 << L1_CACHE_SHIFT)
> >>
> >> +#define ARCH_DMA_MINALIGN   L1_CACHE_BYTES
> > It's not a good idea to blindly set this for all riscv. For "coherent"
> > platforms, this is not necessary and will waste memory.

quote from slab.h:
 * Some archs want to perform DMA into kmalloc caches and need a guaranteed
 * alignment larger than the alignment of a 64-bit integer.
 * Setting ARCH_KMALLOC_MINALIGN in arch headers allows that.

ARCH_DMA_MINALIGN is for the whole system, maybe we could give a
DMA_MINALIGN Kconfig entry in arch/riscv?

> >
> thanks for the reply,
>
> So riscv is the "coherent" platform?
>
> I submit this patch as I got a fix suggestion of another patch to use
> ARCH_DMA_MINALIGN, but riscv doesn't define it.
>
> https://lkml.org/lkml/2021/8/6/723 <https://lkml.org/lkml/2021/8/6/723>
>
> Considering the portability of the code, in my opinion, it is better to
> define it for riscv if it is not "coherent" platform.
>
> >> +
> >>   /*
> >>    * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that
> >>    * the flat loader aligns it accordingly.



-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/