[GIT PULL] RISC-V Fixes for 5.14-rc5

[Palmer Dabbelt]

The following changes since commit ea196c548c0ac407afd31d142712b6da8bd00244:

  riscv: __asm_copy_to-from_user: Fix: Typos in comments (2021-07-23 17:49:12 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.14-rc5

for you to fetch changes up to 867432bec1c6e7df21a361d7f12022a8c5f54022:

  Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED" (2021-08-06 22:41:39 -0700)

----------------------------------------------------------------
RISC-V Fixes for 5.14-rc5

* A fix to avoid dereferencing a null task pointer while walking the
  stack.
* A fix to the memory size in the HiFive Unleashed device tree.
* A fix to disable stack protectors when randstruct is enabled, which
  results in non-deterministic offsets during module builds.
* A pair of fixes to avoid relying on a constant physical memory base
  for the non-XIP builds.

----------------------------------------------------------------
Alexandre Ghiti (2):
      riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion
      Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"

Guenter Roeck (1):
      riscv: Disable STACKPROTECTOR_PER_TASK if GCC_PLUGIN_RANDSTRUCT is enabled

Jisheng Zhang (1):
      riscv: stacktrace: Fix NULL pointer dereference

Qiu Wenbo (1):
      riscv: dts: fix memory size for the SiFive HiFive Unmatched

 arch/riscv/Kconfig                                  |  7 +++++++
 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts |  2 +-
 arch/riscv/include/asm/page.h                       |  7 ++++---
 arch/riscv/kernel/stacktrace.c                      |  2 +-
 arch/riscv/mm/init.c                                | 17 ++++++++++++-----
 5 files changed, 25 insertions(+), 10 deletions(-)