[RFC] dt-bindings: riscv: enum for riscv,isa
palmer at dabbelt.com
Fri Apr 23 04:32:44 BST 2021
On Tue, 06 Apr 2021 12:05:34 PDT (-0700), xypron.glpk at gmx.de wrote:
> In Documentation/devicetree/bindings/riscv/cpus.yaml I find for riscv,isa:
> - rv64imac
> - rv64imafdc
> This implies that 'rv64imafc' or 'rv64imafdqc' would be illegal values
> while these combinations of extensions would be compliant with "The
> RISC-V Instruction Set Manual".
> To me it does not make much sense to try to enumerate all permissible
> permutations of RISC-V extensions.
> Shouldn't this enum be removed and replaced by examples?
I'm generally OK with that, but I'm not sure how to do it: won't we fail
the scheme checks if we don't have something defined for "riscv,isa"?
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