[PATCH] implement flush_cache_vmap for RISC-V

Jiuyang Liu liu at jiuyang.me
Mon Apr 12 01:05:30 BST 2021

This patch implements flush_cache_vmap for RISC-V, since it modifies PTE.
Without this patch, SFENCE.VMA won't be added to related codes, which
might introduce a bug in the out-of-order micro-architecture

Signed-off-by: Jiuyang Liu <liu at jiuyang.me>
Reviewed-by: Alexandre Ghiti <alex at ghiti.fr>
Reviewed-by: Palmer Dabbelt <palmer at dabbelt.com>
 arch/riscv/include/asm/cacheflush.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index 23ff70350992..3fd528badc35 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -30,6 +30,12 @@ static inline void flush_dcache_page(struct page *page)
 #define flush_icache_user_page(vma, pg, addr, len) \
 	flush_icache_mm(vma->vm_mm, 0)
+ * flush_cache_vmap is invoked after map_kernel_range() has installed the page
+ * table entries, which modifies PTE, SFENCE.VMA should be inserted.
+ */
+#define flush_cache_vmap(start, end) flush_tlb_all()
 #ifndef CONFIG_SMP
 #define flush_icache_all() local_flush_icache_all()

More information about the linux-riscv mailing list