[PATCH v6] RISC-V: enable XIP
Vitaly Wool
vitaly.wool at konsulko.com
Wed Apr 7 09:38:05 BST 2021
Hi Alex,
<snip>
> > All in all, I am quite sure now that your take on XIP is working fine.
> > The issue with single-core boot under QEmu seems to be less
> > reproducible on slower machines running QEmu and more reproducible on
> > higher performance ones. It's not clear to me if that is a QEmu
> > problem or an in-kernel race, but it's hardly a XIP problem: I was
> > able to reproduce it once on a non-XIP kernel too, by copying it to
> > RAM in u-boot and giving it a 'go'.
>
> Ok then I'll post a v7 of your patch soon hoping it will go to for-next.
> I'll add my SoB to yours as I modified quite a few things and I thin
> people need to know who to yell at, if you don't mind of course.
No, absolutely not. :) Thanks for digging into this!
Best regards,
Vitaly
More information about the linux-riscv
mailing list