[PATCH v2] riscv: Fix Kendryte K210 device tree

[Palmer Dabbelt]

On Wed, 16 Sep 2020 00:59:41 PDT (-0700), Damien Le Moal wrote:
> The Kendryte K210 SoC CLINT is compatible with Sifive clint v0
> (sifive,clint0). Fix the Kendryte K210 device tree clint entry to be
> inline with the sifive timer definition documented in
> Documentation/devicetree/bindings/timer/sifive,clint.yaml.
> The device tree clint entry is renamed similarly to u-boot device tree
> definition to improve compatibility with u-boot defined device tree.
> To ensure correct initialization, the interrup-cells attribute is added
> and the interrupt-extended attribute definition fixed.
>
> This fixes boot failures with Kendryte K210 SoC boards.
>
> Note that the clock referenced is kept as K210_CLK_ACLK, which does not
> necessarilly match the clint MTIME increment rate. This however does not
> seem to cause any problem for now.
>
> Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
> ---
>  arch/riscv/boot/dts/kendryte/k210.dtsi | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/kendryte/k210.dtsi b/arch/riscv/boot/dts/kendryte/k210.dtsi
> index c1df56ccb8d5..d2d0ff645632 100644
> --- a/arch/riscv/boot/dts/kendryte/k210.dtsi
> +++ b/arch/riscv/boot/dts/kendryte/k210.dtsi
> @@ -95,10 +95,12 @@ sysctl: sysctl at 50440000 {
>  			#clock-cells = <1>;
>  		};
>
> -		clint0: interrupt-controller at 2000000 {
> +		clint0: clint at 2000000 {
> +			#interrupt-cells = <1>;
>  			compatible = "riscv,clint0";
>  			reg = <0x2000000 0xC000>;
> -			interrupts-extended = <&cpu0_intc 3>,  <&cpu1_intc 3>;
> +			interrupts-extended =  <&cpu0_intc 3 &cpu0_intc 7
> +						&cpu1_intc 3 &cpu1_intc 7>;
>  			clocks = <&sysctl K210_CLK_ACLK>;
>  		};

This is on fixes.  Thanks!