[PATCH] riscv: Add HAVE_IRQ_TIME_ACCOUNTING

[Kefeng Wang]

Any comments, kindly ping...

On 2020/10/28 12:28, Kefeng Wang wrote:
> RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
> provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang at huawei.com>
> ---
>   Documentation/features/time/irq-time-acct/arch-support.txt | 2 +-
>   arch/riscv/Kconfig                                         | 1 +
>   2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt
> index d9082b91f10e..6fc03deb1c38 100644
> --- a/Documentation/features/time/irq-time-acct/arch-support.txt
> +++ b/Documentation/features/time/irq-time-acct/arch-support.txt
> @@ -23,7 +23,7 @@
>       |    openrisc: | TODO |
>       |      parisc: |  ..  |
>       |     powerpc: |  ok  |
> -    |       riscv: | TODO |
> +    |       riscv: |  ok  |
>       |        s390: |  ..  |
>       |          sh: | TODO |
>       |       sparc: |  ..  |
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 44377fd7860e..dfbc1351ee62 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -68,6 +68,7 @@ config RISCV
>   	select HAVE_FUTEX_CMPXCHG if FUTEX
>   	select HAVE_GCC_PLUGINS
>   	select HAVE_GENERIC_VDSO if MMU && 64BIT
> +	select HAVE_IRQ_TIME_ACCOUNTING
>   	select HAVE_PCI
>   	select HAVE_PERF_EVENTS
>   	select HAVE_PERF_REGS