[PATCH 02/32] spi: dw: Add support for 32-bits ctrlr0 layout

[Andy Shevchenko]

On Mon, Nov 9, 2020 at 4:34 PM Sean Anderson <seanga2 at gmail.com> wrote:
> On 11/9/20 9:25 AM, Serge Semin wrote:
> > On Sat, Nov 07, 2020 at 05:13:50PM +0900, Damien Le Moal wrote:

...

> > Are you sure they have been moved from [0, 3] to [16, 20]? I don't have the
> > manual for the 4.0x version of the core, but according to this patch:
> > https://patchwork.kernel.org/project/spi-devel-general/patch/1575907443-26377-7-git-send-email-wan.ahmad.zainie.wan.mohamad@intel.com/
> > it has been ok to use the lowest four bits for DFS setting. Is the commit
> > message misleading there?
>
> This commit message is a truncated version of [1].

I don't see how they are related.

> Importantly, DFS is
> valid when SSI_MAX_XFER_SIZE=16. When it =32, then DFS_32 must be used
> (since DFS is constant 0xF). Since SSI_MAX_XFER_SIZE is a synthesis
> parameter, there exist devices where DFS must be used, and also where
> DFS_32 must be used.
>
> [1] https://patchwork.ozlabs.org/project/uboot/patch/20201016225755.302659-10-seanga2@gmail.com/


-- 
With Best Regards,
Andy Shevchenko