[PATCH 06/32] spi: dw: Add support for the Kendryte K210 SoC
Damien Le Moal
Damien.LeMoal at wdc.com
Sat Nov 7 08:42:45 EST 2020
On 2020/11/07 22:31, Sean Anderson wrote:
> On 11/7/20 3:13 AM, Damien Le Moal wrote:
>> The DW SPI master of the Kendryte K210 RISC-V SoC uses the 32-bits
>> ctrlr0 register format. This SoC is also quite slow and gets significant
>> SD card performance improvements from using no-delay polled transfers.
>> Add the dw_spi_k210_init() function tied to the
>> "canaan,kendryte-k210-spi" compatible string to set the
>> DW_SPI_CAP_DFS_32 and DW_SPI_CAP_POLL_NODELAY DW SPI capability fields
>> for this SoC.
>>
>> Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
>> ---
>> drivers/spi/spi-dw-mmio.c | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
>> index 3f1bc384cb45..a00def6c5b39 100644
>> --- a/drivers/spi/spi-dw-mmio.c
>> +++ b/drivers/spi/spi-dw-mmio.c
>> @@ -223,6 +223,14 @@ static int dw_spi_keembay_init(struct platform_device *pdev,
>> return 0;
>> }
>>
>> +static int dw_spi_k210_init(struct platform_device *pdev,
>> + struct dw_spi_mmio *dwsmmio)
>> +{
>> + dwsmmio->dws.caps = DW_SPI_CAP_DFS_32 | DW_SPI_CAP_POLL_NODELAY;
>
> Can't you do runtime detection of DFS_32 in probe?
I think it is possible, but it was much easier this way given that it seems that
only the K210 uses the DFS_32.
>
> --Sean
>
>> +
>> + return 0;
>> +}
>> +
>> static int dw_spi_mmio_probe(struct platform_device *pdev)
>> {
>> int (*init_func)(struct platform_device *pdev,
>> @@ -340,6 +348,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
>> { .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_dwc_ssi_init},
>> { .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
>> { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
>> + { .compatible = "canaan,kendryte-k210-spi", .data = dw_spi_k210_init},
>> { /* end of table */}
>> };
>> MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
>>
>
>
--
Damien Le Moal
Western Digital Research
More information about the linux-riscv
mailing list