[RFC PATCH 2/3] RISC-V: Initial DTS for Microchip ICICLE board

[Cyril.Jean at microchip.com]

On 11/3/20 10:00 AM, Bin Meng wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Fri, Oct 30, 2020 at 5:08 PM Anup Patel <anup at brainfault.org> wrote:
>> On Thu, Oct 29, 2020 at 4:58 AM Atish Patra <atish.patra at wdc.com> wrote:
>>> Add initial DTS for Microchip ICICLE board having only
>>> essential devcies (clocks, sdhci, ethernet, serial, etc).
>>>
>>> Signed-off-by: Atish Patra <atish.patra at wdc.com>
>>> ---
>>>   arch/riscv/boot/dts/Makefile                  |   1 +
>>>   arch/riscv/boot/dts/microchip/Makefile        |   2 +
>>>   .../microchip/microchip-icicle-kit-a000.dts   | 313 ++++++++++++++++++
>> I suggest we split this DTS into two parts:
>> 1. SOC (microchip-polarfire.dtsi)
>> 2. Board (microchip-icicle-kit-a000.dts)
> I also doubt what is the correct board name. I suspect the -a000 comes
> from the SiFive board name convention, but does not apply to the
> Icicle Kit board.
>
> @Cyril, please confirm.
>
Correct. Sorry Padmarao, I missed that one.


Regards,

Cyril.