[PATCH v2 7/9] riscv: dts: add initial support for the SiFive FU740-C000 SoC

[Bin Meng]

Hi Yash,

On Wed, Dec 16, 2020 at 1:24 PM Yash Shah <yash.shah at openfive.com> wrote:
>
> > -----Original Message-----
> > From: Bin Meng <bmeng.cn at gmail.com>
> > Sent: 10 December 2020 19:05
> > To: Yash Shah <yash.shah at openfive.com>
> > Cc: linux-spi at vger.kernel.org; linux-serial at vger.kernel.org; linux-
> > pwm at vger.kernel.org; linux-i2c at vger.kernel.org; linux-kernel <linux-
> > kernel at vger.kernel.org>; linux-riscv <linux-riscv at lists.infradead.org>;
> > devicetree <devicetree at vger.kernel.org>; open list:GPIO SUBSYSTEM <linux-
> > gpio at vger.kernel.org>; broonie at kernel.org; Greg Kroah-Hartman
> > <gregkh at linuxfoundation.org>; Albert Ou <aou at eecs.berkeley.edu>;
> > lee.jones at linaro.org; u.kleine-koenig at pengutronix.de; Thierry Reding
> > <thierry.reding at gmail.com>; andrew at lunn.ch; Peter Korsgaard
> > <peter at korsgaard.com>; Paul Walmsley ( Sifive)
> > <paul.walmsley at sifive.com>; Palmer Dabbelt <palmer at dabbelt.com>; Rob
> > Herring <robh+dt at kernel.org>; Bartosz Golaszewski
> > <bgolaszewski at baylibre.com>; Linus Walleij <linus.walleij at linaro.org>
> > Subject: Re: [PATCH v2 7/9] riscv: dts: add initial support for the SiFive FU740-
> > C000 SoC
> >
> > [External Email] Do not click links or attachments unless you recognize the
> > sender and know the content is safe
> >
> > On Tue, Dec 8, 2020 at 3:06 PM Yash Shah <yash.shah at sifive.com> wrote:
> > >
> > > Add initial support for the SiFive FU540-C000 SoC. FU740-C000 is built
> >
> > FU740-C000 Soc
> >
> > > around the SiFIve U7 Core Complex and a TileLink interconnect.
> > >
> > > This file is expected to grow as more device drivers are added to the
> > > kernel.
> > >
> > > Signed-off-by: Yash Shah <yash.shah at sifive.com>
> > > ---
> > >  arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293
> > > +++++++++++++++++++++++++++++
> > >  1 file changed, 293 insertions(+)
> > >  create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi
> > >
> > > diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
> > > b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
> > > new file mode 100644
> > > index 0000000..eeb4f8c3
> > > --- /dev/null
> > > +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
> > > @@ -0,0 +1,293 @@
>
> ...
>
> > > +               plic0: interrupt-controller at c000000 {
> > > +                       #interrupt-cells = <1>;
> > > +                       #address-cells = <0>;
> > > +                       compatible = "sifive,fu540-c000-plic",
> > > + "sifive,plic-1.0.0";
> >
> > I don't see bindings updated for FU740 PLIC, like "sifive,fu740-c000-plic"?
>
> That's because it is not required. There won't be any difference in driver code for FU740 plic.

Are there any driver changes for the drivers that have an updated
fu640-c000-* bindings? I don't see them in the linux-riscv list.

>
> ...
>
> > > +               eth0: ethernet at 10090000 {
> > > +                       compatible = "sifive,fu540-c000-gem";
> >
> > "sifive,fu740-c000-gem"?
> >
>
> Same reason as above.
>
> Thanks for your review.

Regards,
Bin