[PATCH v5 12/21] riscv: Add Canaan Kendryte K210 reset controller
Philipp Zabel
p.zabel at pengutronix.de
Tue Dec 8 06:44:36 EST 2020
Hi Damien,
On Tue, 2020-12-08 at 16:33 +0900, Damien Le Moal wrote:
> Add a reset controller driver for the Canaan Kendryte K210 SoC. This
> driver relies on its syscon compatible parent node (sysctl) for its
> register mapping. Default this driver compilation to y when the
> SOC_CANAAN option is selected.
>
> The MAINTAINERS file is updated, adding the entry "CANAAN/KENDRYTE K210
> SOC RESET CONTROLLER DRIVER" with myself listed as maintainer for this
> driver.
>
> Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
> ---
> MAINTAINERS | 8 +++
> arch/riscv/Kconfig.socs | 1 +
> drivers/reset/Kconfig | 10 +++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-k210.c | 134 +++++++++++++++++++++++++++++++++++++
> 5 files changed, 154 insertions(+)
> create mode 100644 drivers/reset/reset-k210.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 85a6a0beebd1..6059a1e4caa6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3831,6 +3831,14 @@ W: https://github.com/Cascoda/ca8210-linux.git
> F: Documentation/devicetree/bindings/net/ieee802154/ca8210.txt
> F: drivers/net/ieee802154/ca8210.c
>
> +CANAAN/KENDRYTE K210 SOC RESET CONTROLLER DRIVER
> +M: Damien Le Moal <damien.lemoal at wdc.com>
> +L: linux-kernel at vger.kernel.org
> +L: linux-riscv at lists.infradead.org
> +S: Maintained
> +F: Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml
> +F: drivers/reset/reset-k210.c
> +
> CANAAN/KENDRYTE K210 SOC SYSTEM CONTROLLER DRIVER
> M: Damien Le Moal <damien.lemoal at wdc.com>
> L: linux-riscv at lists.infradead.org
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 88ac0d1a5da4..fdefd7eff1ae 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -29,6 +29,7 @@ config SOC_CANAAN
> select SERIAL_SIFIVE if TTY
> select SERIAL_SIFIVE_CONSOLE if TTY
> select SIFIVE_PLIC
> + select ARCH_HAS_RESET_CONTROLLER
> help
> This enables support for Canaan Kendryte K210 SoC platform hardware.
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 07d162b179fc..ded44889484f 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -82,6 +82,16 @@ config RESET_INTEL_GW
> Say Y to control the reset signals provided by reset controller.
> Otherwise, say N.
>
> +config RESET_K210
> + bool "Reset controller driver for Canaan Kendryte K210 SoC"
> + depends on RISCV && SOC_CANAAN && OF
Please enable compile-testing on other architectures, for example:
depends on ((RISCV && SOC_CANAAN) || COMPILE_TEST) && OF
Are there non-RISCV SOC_CANAAN devices for which this driver shouldn't
be compiled?
If not, you could you drop the RISCV dependency without loss of
information.
> + select MFD_SYSCON
> + default SOC_CANAAN
> + help
> + Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
> + Say Y if you want to control reset signals provided by this
> + controller.
> +
> config RESET_LANTIQ
> bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
> default SOC_TYPE_XWAY
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 16947610cc3b..1730a31e6871 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -33,4 +33,5 @@ obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
> obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o
> obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
> obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o
> +obj-$(CONFIG_RESET_K210) += reset-k210.o
Please sort alphabetically.
> diff --git a/drivers/reset/reset-k210.c b/drivers/reset/reset-k210.c
> new file mode 100644
> index 000000000000..9ccc92a805d8
> --- /dev/null
> +++ b/drivers/reset/reset-k210.c
> @@ -0,0 +1,134 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (c) 2020 Western Digital Corporation or its affiliates.
> + */
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/delay.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +#include <soc/canaan/k210-sysctl.h>
> +
> +#include <dt-bindings/reset/k210-rst.h>
> +
> +#define K210_RST_MASK 0x27FFFFFF
> +
> +struct k210_rst {
> + struct regmap *map;
> + struct reset_controller_dev rcdev;
> +};
> +
> +static inline struct k210_rst *
> +to_k210_rst(struct reset_controller_dev *rcdev)
> +{
> + return container_of(rcdev, struct k210_rst, rcdev);
> +}
> +
> +static inline int k210_rst_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct k210_rst *ksr = to_k210_rst(rcdev);
> +
> + regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 1);
> +
> + return 0;
Just pass the return value on:
return regmap_update_bits(...);
> +}
> +
> +static inline int k210_rst_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct k210_rst *ksr = to_k210_rst(rcdev);
> +
> + regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 0);
> +
> + return 0;
Same as above.
> +}
> +
> +static int k210_rst_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + int ret;
> +
> + ret = k210_rst_assert(rcdev, id);
> + if (ret == 0) {
> + udelay(10);
> + ret = k210_rst_deassert(rcdev, id);
> + }
> +
> + return ret;
> +}
> +
> +static int k210_rst_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct k210_rst *ksr = to_k210_rst(rcdev);
> + u32 reg, bit = BIT(id);
> + int ret;
> +
> + ret = regmap_read(ksr->map, K210_SYSCTL_PERI_RESET, ®);
> + if (ret)
> + return ret;
> +
> + return ret & bit;
Typo here, this should be:
return reg & bit;
With this fixed,
Reviewed-by: Philipp Zabel <p.zabel at pengutronix.de>
regards
Philipp
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