[PATCH v3 12/21] riscv: Add Canaan Kendryte K210 FPIOA driver

[Damien Le Moal]

On 2020/12/01 18:40, Geert Uytterhoeven wrote:
> Hi Damien,
> 
> On Tue, Dec 1, 2020 at 12:50 AM Damien Le Moal <damien.lemoal at wdc.com> wrote:
>> Add the pinctrl-k210.c pinctrl driver for the Canaan Kendryte K210
>> field programmable IO array (FPIOA) to allow configuring the SoC pin
>> functions. The K210 has 48 programmable pins which can take any of 256
>> possible functions.
>>
>> This patch is inspired from the k210 pinctrl driver for the u-boot
>> project and contains many direct contributions from Sean Anderson.
>>
>> The MAINTAINERS file is updated to list myself as maintainer of this new
>> driver.
>>
>> Signed-off-by: Sean Anderson <seanga2 at gmail.com>
>> Signed-off-by: Damien Le Moal <damien.lemoal at wdc.com>
> 
> Thanks for your patch!
> 
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -3826,10 +3826,13 @@ CANAAN/KENDRYTE K210 RISC-V SOC SUPPORT
>>  M:     Damien Le Moal <damien.lemoal at wdc.com>
>>  L:     linux-riscv at lists.infradead.org
>>  L:     linux-clk at vger.kernel.org (clock driver)
>> +L:     linux-gpio at vger.kernel.org (pinctrl driver)
>>  S:     Maintained
>>  F:     Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml
>>  F:     Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml
>> +F:     Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml
>>  F:     drivers/clk/clk-k210.c
>> +F:     drivers/pinctrl/pinctrl-k210.c
>>  F:     drivers/soc/canaan/
>>  F:     include/soc/canaan/
> 
> Please create separate sections for the clock and pinctrl drivers,
> to avoid all 3 mailing lists being suggested by get_maintainers for
> all changes to any of the file patterns.  People will blindly use the
> get_maintainers scripts' output.

OK. Sending v4 with that fixed.

Thanks !

> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 


-- 
Damien Le Moal
Western Digital Research