[PATCH] riscv: Setup exception vector for K210 properly

[邱文博]

The serial port did not print anything after early console. 

[    0.000000] Sorting __ex_table...
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 6480K/8192K available (1024K kernel code, 111K rwdata, 170K rodata, 101K init, 97K bss, 1712K reserved, 0K cma-reserved)
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] riscv-intc: 64 local interrupts mapped
[    0.000000] plic: interrupt-controller at c000000: mapped 65 interrupts with 2 handlers for 4 contexts.
[    0.000000] random: get_random_bytes called from 0x00000000800019a4 with crng_init=0
[    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x3990be68b, max_idle_ns: 881590404272 ns
[    0.000015] sched_clock: 64 bits at 7MHz, resolution 128ns, wraps every 4398046511054ns
[    0.008254] Console: colour dummy device 80x25



> -----原始邮件-----
> 发件人: "Damien Le Moal" <damien.lemoal at wdc.com>
> 发送时间: 2020-08-11 14:42:15 (星期二)
> 收件人: "Qiu Wenbo" <qiuwenbo at phytium.com.cn>, "Palmer Dabbelt" <palmer at dabbelt.com>, "Paul Walmsley" <paul.walmsley at sifive.com>, "linux-riscv at lists.infradead.org" <linux-riscv at lists.infradead.org>
> 抄送: "Albert Ou" <aou at eecs.berkeley.edu>, "Atish Patra" <atish.patra at wdc.com>, "Anup
>  Patel" <anup at brainfault.org>, "Guo Ren" <guoren at linux.alibaba.com>, "Zong Li" <zong.li at sifive.com>, "Greentime Hu" <greentime.hu at sifive.com>, "Vincent Chen" <vincent.chen at sifive.com>, "linux-kernel at vger.kernel.org" <linux-kernel at vger.kernel.org>
> 主题: Re: [PATCH] riscv: Setup exception vector for K210 properly
> 
> On 2020/08/11 15:38, Qiu Wenbo wrote:
> > Exception vector is missing on nommu platform and it is a big issue.
> > This patch is tested in Sipeed MAIX Bit Dev Board.
> > 
> > Fixes: 79b1feba5455 ("RISC-V: Setup exception vector early")
> > Signed-off-by: Qiu Wenbo <qiuwenbo at phytium.com.cn>
> > ---
> >  arch/riscv/kernel/smpboot.c |  1 +
> >  arch/riscv/kernel/traps.c   | 11 ++++++++++-
> >  2 files changed, 11 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> > index 356825a57551..23cde0ceb39d 100644
> > --- a/arch/riscv/kernel/smpboot.c
> > +++ b/arch/riscv/kernel/smpboot.c
> > @@ -154,6 +154,7 @@ asmlinkage __visible void smp_callin(void)
> >  	mmgrab(mm);
> >  	current->active_mm = mm;
> >  
> > +	trap_init();
> >  	notify_cpu_starting(curr_cpuid);
> >  	update_siblings_masks(curr_cpuid);
> >  	set_cpu_online(curr_cpuid, 1);
> > diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> > index ad14f4466d92..a390239818ae 100644
> > --- a/arch/riscv/kernel/traps.c
> > +++ b/arch/riscv/kernel/traps.c
> > @@ -174,7 +174,16 @@ int is_valid_bugaddr(unsigned long pc)
> >  }
> >  #endif /* CONFIG_GENERIC_BUG */
> >  
> > -/* stvec & scratch is already set from head.S */
> > +/* stvec & scratch is already set from head.S when mmu is enabled */
> >  void trap_init(void)
> >  {
> > +#ifndef CONFIG_MMU
> > +	/*
> > +	 * Set sup0 scratch register to 0, indicating to exception vector
> > +	 * that we are presently executing in the kernel
> > +	 */
> > +	csr_write(CSR_SCRATCH, 0);
> > +	/* Set the exception vector address */
> > +	csr_write(CSR_TVEC, &handle_exception);
> > +#endif
> >  }
> > 
> 
> Looks OK to me. But out of curiosity, how did you trigger a problem ? I never
> got any weird exceptions with my busybox userspace.
> 
> -- 
> Damien Le Moal
> Western Digital Research
</qiuwenbo at phytium.com.cn></linux-kernel at vger.kernel.org></vincent.chen at sifive.com></greentime.hu at sifive.com></zong.li at sifive.com></guoren at linux.alibaba.com></anup at brainfault.org></atish.patra at wdc.com></aou at eecs.berkeley.edu></linux-riscv at lists.infradead.org></paul.walmsley at sifive.com></palmer at dabbelt.com></qiuwenbo at phytium.com.cn></damien.lemoal at wdc.com>