[sw-dev] Re: [isa-dev] riscv-qemu - linux boot is failing for vda device

Palmer Dabbelt palmer at sifive.com
Tue Oct 16 11:38:53 PDT 2018


On Tue, 16 Oct 2018 06:12:11 PDT (-0700), pintu.ping at gmail.com wrote:
> On Tue, Oct 16, 2018 at 6:10 AM Palmer Dabbelt <palmer at sifive.com> wrote:
>>
>> On Mon, 15 Oct 2018 14:14:51 PDT (-0700), rjones at redhat.com wrote:
>
>> >
>> >> > virtio_blk: probe of virtio0 failed with error -22
>> >
>> > ... I saw this exact error when I was using the upstream kernel
>> > instead of the one which supported interrupt handling.  Interrupt
>> > handling for RISC-V was added upstream after 4.18 so wouldn't be
>> > included in upstream 4.18.0-rc6.
>>
>> Your best bet today is to run 4.19-rc8, which should be pretty stable.
>
> Yes, I checked with mainline linux-kernel 4.19.
> Now I am able to boot successfully and login into qemu-riscv shell.
> Thank you so much :)
>
> But I am curious to know what changes resulted into this fix, in 4.19 kernel ?
> Which is the exact patch in mainline, that fixes this issue?
> Because at times during the development, it will be difficult to
> simply upgrade the kernel version.

Yes, that's expected.  RISC-V Linux is still pretty bleeding edge, you just 
happened to catch it between when master started working and when there was a 
proper release that contained your patches.  Since master is very calm right 
now (there was an rc8 before release, but it's very close to a release) it's OK 
to use, but you best bet going forward is to use the release tarballs just like 
normal.

> So, I wanted to stick to 4.18 itself, however I can back port the
> patches from 4.19 to fix the issue.

We have a backports branch, it's called "riscv-linux-4.18".  I'll continue to 
produce a backports branch for the latest upstream release until things get 
pretty stable.

> So, if you can point me to the exact patch, it will be of great help.

Here's the PLIC driver, but it depends on a bunch of other patches.  Like I 
said, that's what the backports branch is for :)

$ git log drivers/irqchip/irq-sifive-plic.c | cat
commit 8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a
gpg: Signature made Mon 13 Aug 2018 08:31:32 AM PDT
gpg:                using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
gpg:                issuer "palmer at dabbelt.com"
gpg: Good signature from "Palmer Dabbelt <palmer at dabbelt.com>" [ultimate]
gpg:                 aka "Palmer Dabbelt <palmer at sifive.com>" [ultimate]
Author: Christoph Hellwig <hch at lst.de>
Date:   Thu Jul 26 16:27:00 2018 +0200

    irqchip: add a SiFive PLIC driver

    Add a driver for the SiFive implementation of the RISC-V Platform Level
    Interrupt Controller (PLIC).  The PLIC connects global interrupt sources
    to the local interrupt controller on each hart.

    This driver is based on the driver in the RISC-V tree from Palmer Dabbelt,
    but has been almost entirely rewritten since, and includes many fixes
    from Atish Patra.

    Signed-off-by: Christoph Hellwig <hch at lst.de>
    Acked-by: Thomas Gleixner <tglx at linutronix.de>
    Reviewed-by: Atish Patra <atish.patra at wdc.com>
    [Binding update by Palmer]
    Signed-off-by: Palmer Dabbelt <palmer at sifive.com>

>
> Thanks,
> Pintu



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